VHDL development environment, elevator control system, transmission control up a...


  VHDL-FPGA-Verilog    VHDL   

Add to my favorites
Download Source Codes:   elevator.rar (1.68 MB)  

    Sponsored links


VHDL development environment, elevator control system, transmission control up and down elevators.

    Sponsored links

Project Files

NameSizeDate
 counter.asm.rpt8.33 kB24-06-08 13:07
 counter.bsf2.08 kB28-06-08 23:02
 counter.done26.00 B28-06-08 23:02
 counter.fit.rpt129.42 kB24-06-08 13:07
 counter.fit.summary601.00 B24-06-08 13:07
 counter.flow.rpt5.31 kB24-06-08 13:07
 counter.map.rpt17.84 kB24-06-08 13:06
 counter.map.summary455.00 B24-06-08 13:06
 counter.pin56.95 kB24-06-08 13:07
 counter.pof2.00 MB24-06-08 13:07
 counter.qpf907.00 B24-06-08 13:06
 counter.qsf2.14 kB28-06-08 23:02
 counter.qws579.00 B28-06-08 23:03
 counter.sim.rpt9.88 kB28-06-08 22:46
 counter.sof464.58 kB24-06-08 13:07
 counter.tan.rpt18.60 kB24-06-08 13:07
 counter.tan.summary1.38 kB24-06-08 13:07
 counter.vhd734.00 B24-06-08 13:06
 counter.vwf4.29 kB28-06-08 22:46
 counter.(0).cnf.cdb1.42 kB24-06-08 13:06
 counter.(0).cnf.hdb619.00 B24-06-08 13:06
 counter.asm.qmsg2.00 kB24-06-08 13:07
 counter.asm_labs.ddb251.64 kB24-06-08 13:07
 counter.cbx.xml89.00 B24-06-08 13:06
 counter.cmp.bpm446.00 B24-06-08 13:07
 counter.cmp.cdb3.49 kB24-06-08 13:07
 counter.cmp.ecobp28.00 B24-06-08 13:07
 counter.cmp.hdb6.28 kB24-06-08 13:07
 counter.cmp.logdb4.00 B24-06-08 13:07
 counter.cmp.rdb17.57 kB24-06-08 13:07
 counter.cmp.tdb2.39 kB24-06-08 13:07
 counter.cmp0.ddb46.28 kB24-06-08 13:07
 counter.cmp2.ddb39.52 kB24-06-08 13:07
 counter.cmp_bb.cdb2.05 kB24-06-08 13:07
 counter.cmp_bb.hdb6.22 kB24-06-08 13:07
 counter.cmp_bb.logdb4.00 B24-06-08 13:07
 counter.cmp_bb.rcf798.00 B24-06-08 13:07
 <counter.dbp>0.00 B24-06-08 13:06
 counter.db_info151.00 B24-06-08 13:06
 counter.eco.cdb175.00 B28-06-08 23:03
 counter.eds_overflow3.00 B28-06-08 22:46
 counter.fit.qmsg28.40 kB24-06-08 13:07
 counter.hier_info434.00 B24-06-08 13:06
 counter.hif781.00 B24-06-08 13:06
 counter.map.bpm443.00 B24-06-08 13:06
 counter.map.cdb1.38 kB24-06-08 13:06
 counter.map.ecobp28.00 B24-06-08 13:06
 counter.map.hdb6.06 kB24-06-08 13:06
 counter.map.logdb4.00 B24-06-08 13:06
 counter.map.qmsg1.87 kB28-06-08 23:02
 counter.map_bb.cdb1.25 kB24-06-08 13:06
 counter.map_bb.hdb6.06 kB24-06-08 13:06
 counter.map_bb.logdb4.00 B24-06-08 13:06
 counter.pre_map.cdb1.44 kB24-06-08 13:06
 counter.pre_map.hdb6.36 kB24-06-08 13:06
 counter.psp3.00 B24-06-08 13:06
 counter.pss37.00 B24-06-08 13:06
 counter.rpp.qmsg1.64 kB28-06-08 22:41
 counter.rtlv.hdb6.35 kB24-06-08 13:06
 counter.rtlv_sg.cdb1.37 kB24-06-08 13:06
 counter.rtlv_sg_swap.cdb192.00 B24-06-08 13:06
 counter.sgate.rvd1.98 kB28-06-08 22:41
 counter.sgate_sm.rvd230.00 B28-06-08 22:41
 counter.sgdiff.cdb1.23 kB24-06-08 13:06
 counter.sgdiff.hdb6.36 kB24-06-08 13:06
 counter.signalprobe.cdb882.00 B24-06-08 13:07
 counter.sim.cvwf1.05 kB28-06-08 22:46
 counter.sim.hdb3.08 kB28-06-08 22:46
 counter.sim.qmsg3.18 kB28-06-08 22:46
 counter.sim.rdb2.41 kB28-06-08 22:46
 counter.sld_design_entry.sci168.00 B28-06-08 23:03
 counter.sld_design_entry_dsc.sci168.00 B24-06-08 13:06
 <counter.syn_hier_info>0.00 B24-06-08 13:06
 counter.tan.qmsg36.69 kB24-06-08 13:07
 counter.tis_db_list.ddb188.00 B24-06-08 13:07
 prev_cmp_counter.asm.qmsg2.00 kB28-06-08 22:41
 prev_cmp_counter.fit.qmsg28.40 kB28-06-08 22:41
 prev_cmp_counter.map.qmsg3.23 kB28-06-08 22:41
 prev_cmp_counter.qmsg3.18 kB28-06-08 22:46
 prev_cmp_counter.sim.qmsg3.18 kB28-06-08 22:46
 prev_cmp_counter.tan.qmsg36.69 kB28-06-08 22:41
 wed.wsf3.24 kB28-06-08 22:47
 counter.vhd734.00 B24-06-08 11:28
 maincontroller.(0).cnf.cdb18.26 kB28-06-08 13:23
 maincontroller.(0).cnf.hdb2.48 kB28-06-08 13:23
 maincontroller.(1).cnf.cdb1.42 kB24-06-08 13:14
 maincontroller.(1).cnf.hdb624.00 B24-06-08 13:14
 maincontroller.analyze_file.qmsg3.08 kB24-06-08 12:58
 maincontroller.asm.qmsg4.30 kB29-06-08 21:26
 maincontroller.asm_labs.ddb272.70 kB29-06-08 21:26
 maincontroller.cbx.xml96.00 B29-06-08 18:27
 maincontroller.cmp.bpm885.00 B29-06-08 21:26
 maincontroller.cmp.cdb76.38 kB29-06-08 21:26
 maincontroller.cmp.ecobp28.00 B29-06-08 21:26
 maincontroller.cmp.hdb14.90 kB29-06-08 21:26
 maincontroller.cmp.logdb4.00 B29-06-08 21:26
 maincontroller.cmp.qrpt178.00 B29-06-08 21:36
 maincontroller.cmp.rdb24.03 kB29-06-08 21:26
 maincontroller.cmp0.ddb215.32 kB29-06-08 21:26
 maincontroller.cmp1.ddb211.37 kB29-06-08 21:26
 maincontroller.cmp2.ddb51.51 kB29-06-08 21:26
 maincontroller.cmp_bb.cdb30.07 kB29-06-08 21:26
 maincontroller.cmp_bb.hdb14.31 kB29-06-08 21:26
 maincontroller.cmp_bb.logdb4.00 B29-06-08 21:26
 maincontroller.cmp_bb.rcf18.84 kB29-06-08 21:26
 <maincontroller.dbp>0.00 B29-06-08 18:27
 maincontroller.db_info151.00 B22-06-86 20:38
 maincontroller.drc.qmsg48.20 kB29-06-08 21:26
 maincontroller.eco.cdb175.00 B29-06-08 21:55
 maincontroller.eds_overflow4.00 B29-06-08 00:20
 maincontroller.fit.qmsg75.49 kB29-06-08 21:26
 maincontroller.fnsim.hdb15.03 kB28-06-08 16:31
 maincontroller.fnsim.qmsg4.69 kB28-06-08 16:31
 maincontroller.hier_info10.04 kB29-06-08 18:27
 maincontroller.hif1.36 kB29-06-08 18:27
 maincontroller.map.bpm865.00 B29-06-08 18:27
 maincontroller.map.cdb17.53 kB29-06-08 18:27
 maincontroller.map.ecobp28.00 B29-06-08 18:27
 maincontroller.map.hdb13.55 kB29-06-08 18:27
 maincontroller.map.logdb4.00 B29-06-08 18:27
 maincontroller.map.qmsg11.67 kB29-06-08 18:27
 maincontroller.map_bb.cdb17.27 kB29-06-08 18:27
 maincontroller.map_bb.hdb13.58 kB29-06-08 18:27
 maincontroller.map_bb.logdb4.00 B29-06-08 18:27
 maincontroller.pre_map.cdb20.93 kB29-06-08 18:27
 maincontroller.pre_map.hdb12.62 kB29-06-08 18:27
 maincontroller.psp3.00 B29-06-08 18:27
 maincontroller.pss144.00 B29-06-08 18:27
 maincontroller.rpp.qmsg1.67 kB28-06-08 23:27
 maincontroller.rtlv.hdb12.62 kB29-06-08 18:27
 maincontroller.rtlv_sg.cdb20.12 kB29-06-08 18:27
 maincontroller.rtlv_sg_swap.cdb594.00 B29-06-08 18:27
 maincontroller.sgate.rvd38.38 kB28-06-08 23:27
 maincontroller.sgate_sm.rvd5.57 kB28-06-08 23:27
 maincontroller.sgdiff.cdb19.52 kB29-06-08 18:27
 maincontroller.sgdiff.hdb13.05 kB29-06-08 18:27
 maincontroller.signalprobe.cdb729.00 B29-06-08 21:26
 maincontroller.sim.cvwf2.76 kB29-06-08 00:20
 maincontroller.sim.hdb3.25 kB29-06-08 00:20
 maincontroller.sim.qmsg3.73 kB29-06-08 00:20
 maincontroller.sim.rdb8.32 kB29-06-08 00:20
 maincontroller.sld_design_entry.sci168.00 B29-06-08 21:55
 maincontroller.sld_design_entry_dsc.sci168.00 B29-06-08 18:27
 maincontroller.smp_dump.txt270.00 B29-06-08 18:27
 maincontroller.sta.qmsg10.77 kB29-06-08 21:26
 maincontroller.sta.rdb5.69 kB29-06-08 21:26
 <maincontroller.syn_hier_info>0.00 B29-06-08 18:27
 maincontroller.tan.qmsg4.51 kB28-06-08 16:32
 maincontroller.tis_db_list.ddb188.00 B29-06-08 21:26
 prev_cmp_maincontroller.asm.qmsg4.30 kB29-06-08 21:25
 prev_cmp_maincontroller.drc.qmsg48.20 kB29-06-08 21:25
 prev_cmp_maincontroller.fit.qmsg75.49 kB29-06-08 21:25
 prev_cmp_maincontroller.map.qmsg11.67 kB29-06-08 21:25
 prev_cmp_maincontroller.qmsg7.54 kB29-06-08 18:27
 prev_cmp_maincontroller.sim.qmsg3.73 kB29-06-08 00:20
 prev_cmp_maincontroller.sta.qmsg10.77 kB29-06-08 21:25
 prev_cmp_maincontroller.tan.qmsg75.92 kB24-06-08 14:32
 wed.wsf19.20 kB29-06-08 00:24
 maincontroller.asm.rpt9.04 kB29-06-08 21:26
 maincontroller.bsf2.89 kB28-06-08 23:29
 maincontroller.done26.00 B29-06-08 21:26
 maincontroller.drc.rpt30.49 kB29-06-08 21:26
 maincontroller.fit.rpt177.43 kB29-06-08 21:26
 maincontroller.fit.summary619.00 B29-06-08 21:26
 maincontroller.flow.rpt10.32 kB29-06-08 21:26
 maincontroller.map.rpt23.06 kB29-06-08 18:27
 maincontroller.map.summary476.00 B29-06-08 18:27
 maincontroller.pin56.96 kB29-06-08 21:26
 maincontroller.pof2.00 MB29-06-08 21:26
 maincontroller.qpf914.00 B22-06-86 20:38
 maincontroller.qsf5.04 kB29-06-08 21:55
 maincontroller.qws587.00 B29-06-08 21:55
 maincontroller.sdc3.34 kB29-06-08 18:18
 maincontroller.sim.rpt96.76 kB29-06-08 00:20
 maincontroller.sof464.58 kB29-06-08 21:26
 maincontroller.sta.rpt38.11 kB29-06-08 21:26
 maincontroller.sta.summary1.55 kB29-06-08 21:26
 maincontroller.tan.rpt137.52 kB24-06-08 14:13
 maincontroller.tan.summary1.66 kB24-06-08 14:13
 maincontroller.vhd5.46 kB28-06-08 11:44
 maincontroller.vwf34.35 kB29-06-08 00:20
 maincontroller.vwf34.35 kB29-06-08 00:20
 prev_cmp_subcontroller.asm.qmsg2.03 kB24-06-08 14:00
 prev_cmp_subcontroller.fit.qmsg55.16 kB24-06-08 14:00
 prev_cmp_subcontroller.map.qmsg4.34 kB24-06-08 14:00
 prev_cmp_subcontroller.qmsg3.23 kB28-06-08 22:49
 prev_cmp_subcontroller.sim.qmsg3.23 kB28-06-08 22:47
 prev_cmp_subcontroller.tan.qmsg45.07 kB24-06-08 14:00
 subcontroller.(0).cnf.cdb3.42 kB24-06-08 13:05
 subcontroller.(0).cnf.hdb979.00 B24-06-08 13:05
 subcontroller.asm.qmsg2.03 kB24-06-08 13:05
 subcontroller.asm_labs.ddb254.60 kB24-06-08 13:05
 subcontroller.cbx.xml95.00 B24-06-08 13:05
 subcontroller.cmp.bpm698.00 B24-06-08 13:05
 subcontroller.cmp.cdb13.21 kB24-06-08 13:05
 subcontroller.cmp.ecobp28.00 B24-06-08 13:05
 subcontroller.cmp.hdb7.91 kB24-06-08 13:05
 subcontroller.cmp.logdb4.00 B24-06-08 13:05
 subcontroller.cmp.rdb21.23 kB24-06-08 13:05
 subcontroller.cmp.tdb11.07 kB24-06-08 13:05
 subcontroller.cmp0.ddb70.72 kB24-06-08 13:05
 subcontroller.cmp2.ddb44.91 kB24-06-08 13:05
 subcontroller.cmp_bb.cdb6.29 kB24-06-08 13:05
 subcontroller.cmp_bb.hdb7.59 kB24-06-08 13:05
 subcontroller.cmp_bb.logdb4.00 B24-06-08 13:05
 subcontroller.cmp_bb.rcf2.93 kB24-06-08 13:05
 <subcontroller.dbp>0.00 B24-06-08 13:05
 subcontroller.db_info151.00 B24-06-08 12:59
 subcontroller.eco.cdb175.00 B28-06-08 23:01
 subcontroller.eds_overflow4.00 B28-06-08 22:47
 subcontroller.fit.qmsg55.16 kB24-06-08 13:05
 subcontroller.hier_info6.83 kB24-06-08 13:05
 subcontroller.hif804.00 B24-06-08 13:05
 subcontroller.map.bpm693.00 B24-06-08 13:05
 subcontroller.map.cdb4.16 kB24-06-08 13:05
 subcontroller.map.ecobp28.00 B24-06-08 13:05
 subcontroller.map.hdb7.43 kB24-06-08 13:05
 subcontroller.map.logdb4.00 B24-06-08 13:05
 subcontroller.map.qmsg1.92 kB28-06-08 22:49
 subcontroller.map_bb.cdb4.06 kB24-06-08 13:05
 subcontroller.map_bb.hdb7.45 kB24-06-08 13:05
 subcontroller.map_bb.logdb4.00 B24-06-08 13:05
 subcontroller.pre_map.cdb3.57 kB24-06-08 13:05
 subcontroller.pre_map.hdb6.95 kB24-06-08 13:05
 subcontroller.psp3.00 B24-06-08 13:05
 subcontroller.pss36.00 B24-06-08 13:05
 subcontroller.rpp.qmsg1.67 kB24-06-08 14:00
 subcontroller.rtlv.hdb6.94 kB24-06-08 13:05
 subcontroller.rtlv_sg.cdb3.50 kB24-06-08 13:05
 subcontroller.rtlv_sg_swap.cdb192.00 B24-06-08 13:05
 subcontroller.sgate.rvd5.09 kB24-06-08 14:00
 subcontroller.sgate_sm.rvd236.00 B24-06-08 14:00
 subcontroller.sgdiff.cdb2.40 kB24-06-08 13:05
 subcontroller.sgdiff.hdb6.97 kB24-06-08 13:05
 subcontroller.signalprobe.cdb827.00 B24-06-08 13:05
 subcontroller.sim.cvwf1.96 kB28-06-08 22:47
 subcontroller.sim.hdb3.09 kB28-06-08 22:47
 subcontroller.sim.qmsg3.23 kB28-06-08 22:47
 subcontroller.sim.rdb3.21 kB28-06-08 22:47
 subcontroller.sld_design_entry.sci168.00 B28-06-08 23:01
 subcontroller.sld_design_entry_dsc.sci168.00 B24-06-08 13:05
 <subcontroller.syn_hier_info>0.00 B24-06-08 13:05
 subcontroller.tan.qmsg45.07 kB24-06-08 13:05
 subcontroller.tis_db_list.ddb188.00 B24-06-08 13:05
 wed.wsf10.02 kB28-06-08 23:01
 subcontroller.asm.rpt8.68 kB24-06-08 13:05
 subcontroller.bsf3.04 kB28-06-08 22:49
 subcontroller.done26.00 B28-06-08 22:49
 subcontroller.fit.rpt149.91 kB24-06-08 13:05
 subcontroller.fit.summary617.00 B24-06-08 13:05
 subcontroller.flow.rpt5.36 kB24-06-08 13:05
 subcontroller.map.rpt17.12 kB24-06-08 13:05
 subcontroller.map.summary470.00 B24-06-08 13:05
 subcontroller.pin56.96 kB24-06-08 13:05
 subcontroller.pof2.00 MB24-06-08 13:05
 subcontroller.qpf913.00 B24-06-08 12:59
 subcontroller.qsf2.16 kB28-06-08 22:49
 subcontroller.qws1.13 kB28-06-08 23:01
 subcontroller.sim.rpt17.60 kB28-06-08 22:47
 subcontroller.sof464.58 kB24-06-08 13:05
 subcontroller.tan.rpt31.04 kB24-06-08 13:05
 subcontroller.tan.summary1.60 kB24-06-08 13:05
 subcontroller.vhd2.01 kB28-06-08 13:14
 subcontroller.vwf17.55 kB28-06-08 11:09
 subcontroller.vhd2.01 kB28-06-08 11:34
 使用说明请参看右侧注释====〉〉.txt774.00 B28-01-08 15:31
 <db>0.00 B02-03-09 22:18
 <db>0.00 B02-03-09 22:18
 <counter>0.00 B02-03-09 22:18
 <db>0.00 B02-03-09 22:18
 <simulation2and3>0.00 B0% 02-03-09
 <subcontroller>0.00 B02-03-09 22:18
 <maincontroller>0.00 B02-03-09 22:18
 <电梯控制器VHDL设计>0.00 B02-03-09 22:18
...

Related Items


    Sponsored links
  1. VHDL realization 8051 (full version)(Algorithm - VHDL) - VHDL realization 8051 (full version) ...
  2. VHDL obtaining quadrature(signal Processing - VHDL) - library ieee; use ieee.std_logic_1164.all; use ieee.std_lo ...
  3. digital to analog convertor using vhdl ams(vhdl - VHDL) - Its a project baded on implementing digital to analog con ...
  4. 16 bit risc processor for computer hardware (Algorithm - VHDL) - 16 bit risc processor for computer hardware  ...
  5. An Implementation of a Fault Detection and Isolation System on Foundation Fieldbus Environment(Data - PPT) - This work shows an implementation of a fault detection and ...
  6. Countdown clock(sock - VHDL) - VHDL countdown clock, Countdown to A,B at the same time, the ...
  7. FSMD with reg,mux,fib(Embeded - VHDL) - An FSMD impemented in VHDL, with a mux,reg,fib function, tes ...
  8. Counter Impl sp605(Embeded - VHDL) - A counter implementation for sp605 xilinx board ...
  9. Adder Subber xilinx fpga sp605(Embeded - VHDL) - Adder/subber project for xilinx fpga sp605 ...
  10. environment.rar(VHDL-FPGA-Verilog - VHDL) - VHDL development environment Answer four, and the realizatio ...
  11. KEYBOARD_DEC-vhdl.ra(VHDL-FPGA-Verilog - Others) - maxplus2 VHDL development environment for the preparation of ...
  12. SCAN-vhdl.rar(VHDL-FPGA-Verilog - Others) - maxplus2 VHDL development environment for the preparation of ...
  13. elevator.rar(VHDL-FPGA-Verilog - VHDL) - VHDL development environment, elevator control system, trans ...
  14. PS2_verilog_source.r(VHDL-FPGA-Verilog - VHDL) - In VHDL development environment, with regard to the agreemen ...
  15. taxi.rar(VHDL-FPGA-Verilog - VHDL) - VHDL development environment, taxi billing system to achieve ...
  16. FrequencyMeasurement(VHDL-FPGA-Verilog - Others) - VHDL achieve a frequency measurement of dollars, development ...
  17. DISPLAY-vhdl.rar(VHDL-FPGA-Verilog - Others) - VHDL description of the display code development environment ...
  18. paobiao.rar(VHDL-FPGA-Verilog - VHDL) - Software development environment: ISE 7.1i simulation enviro ...
  19. traffic_control.rar(VHDL-FPGA-Verilog - VHDL) - Software development environment: ISE 7.1i simulation enviro ...
  20. Freq_counter.rar(VHDL-FPGA-Verilog - Others) - the code on the FPGA using VHDL development of the general p ...