Floating Point Unit
2016-08-23
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This document describes the Verilog double precision floating point core, these
cores are designed to meet the IEEE 754 standard for double precision floating point arithmetic.
Floating Point IP Core (Verilog)
The floating point IP core is separated into 7 source files:
1. fpu_double.v (top level)
2. fpu_add.v
3. fpu_sub.v
4. fpu_mul.v
5. fpu_div.v
6. fpu_round.v
verilog
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