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Verilog simulation filters

astrid
2013-11-24 00:30:40
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Category Category:
verilogverilog Verilog HDLVerilog

Description

Verilog procedural simulation filters

16-order using the Adder and multiplier 40KHZ

16-bit into and out

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File list

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Name Size Date
基于VerilogHDL的FIR数字滤波器设计与仿真.pdf129.97 kB13-05-04 16:18
...
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zhuangzhi
2016-05-18

运行了下软件,非常不错,推荐大家下载

tuannapro1996
2017-09-12

good

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Verilog simulation filters (97.38 kB)

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