I2C emulation model
2016-08-23
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i2c_slave_bfm.v ---- i2c model
I2c_slave_bfm_readme---documentation
The simulation model of the temporal parameter meets the requirements of check ensures that automated validation developer. Efficient simulation.
Timing parameters can be modified according to different devices, simple and easy to use.
verilog
仿真
Model
IC
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