Home » Source Code » FPU Floating point unit verilog VHDL

FPU Floating point unit verilog VHDL

stoverson
2013-12-30 00:47:48
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verilogverilog Verilog HDLVerilog

Description

FPU (Floating Point Unit) is very useful in the moden ASIC and SOC designs. This module has been verified by FPGA and EDA env. But if you want to use it in a real project, please verify it with some formal method. 
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File list

Tips: You can preview the content of files by clicking file names^_^
Name Size Date
fpu_round.vhd5.57 kB19-01-09 16:26
fpu_sub.vhd8.45 kB27-03-09 02:35
fpupack.vhd3.39 kB19-01-09 16:26
Readme.txt5.68 kB19-01-09 16:26
comppack.vhd4.95 kB19-01-09 16:26
fpu_add.vhd7.17 kB19-01-09 16:26
fpu_div.vhd14.68 kB14-02-10 00:39
fpu_double.PDF100.34 kB23-01-09 14:17
fpu_double.vhd11.30 kB19-01-09 16:26
fpu_double_TB.vhd22.00 kB19-01-09 16:26
fpu_exceptions.vhd14.94 kB21-11-09 14:10
fpu_mul.vhd10.38 kB19-01-09 16:26
...
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Comments

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hyc1014
2015-04-13

FPU is very good.

neerajfunnyguy01
2015-06-13

NICE PROJEC TO IMPLEMENT ON VERILOG

Kesa777
2017-03-07

its useful

Kesa777
2017-03-07

its useful

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FPU Floating point unit verilog VHDL (118.70 kB)

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