Home » Source Code » VHDL Design of 16 Radix 4 point FFT

VHDL Design of 16 Radix 4 point FFT

Lekha
2014-06-12 02:36:34
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vhdlvhdl VHDLVHDL

Description

Design and functional implementation of a 16-point pipelined FFT architecture is presented. 

The architecture is based on the radix-4 algorithm. 

By exploiting the regularity of the algorithm, butterfly operation and multiplier modules were designed.

 The architecture adopts four butterflies, and the pipeline stage is optimized to balance the processing speed and the area.

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rad4new.vhd4.88 kB11-03-14 13:23
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1619010724
2016-01-19

it is very popular project

SkBulusu
2016-12-30

very useful for code learners

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VHDL Design of 16 Radix 4 point FFT (1.42 kB)

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