Study on Turbo Code decoder and FPGA implementatio
2016-08-23
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Altera Quartus II software platform completed the decoding of Turbo codes based on Log-MAP algorithm for FPGA design and implementation. In Turbo yards of FPGA design and achieved part, main for has Turbo yards of compiled yards device in the all important module for has design and achieved, such as coding device in the RSC component decoder, and interwoven device, and decoder in the on data quantitative and operation, and e function, and SISO component decoder (branch metric, and Qian to handed pushed, and Hou to handed pushed and logarithmic relieved than of calculation) of design and achieved.
vhdl
fpga
编码
实现
研究
及其
turbo
译码器
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