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Study on Turbo Code decoder and FPGA implementation.

2014-09-29 09:59:16
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Altera Quartus II software platform completed the decoding of Turbo codes based on Log-MAP algorithm for FPGA design and implementation. In Turbo yards of FPGA design and achieved part, main for has Turbo yards of compiled yards device in the all important module for has design and achieved, such as coding device in the RSC component decoder, and interwoven device, and decoder in the on data quantitative and operation, and e function, and SISO component decoder (branch metric, and Qian to handed pushed, and Hou to handed pushed and logarithmic relieved than of calculation) of design and achieved.
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Turbo码编码译码器的研究及其FPGA实现.pdf5.81 MB27-09-14 22:36
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跟着学习一下 看着挺不错的 初学者 还在探索中

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Study on Turbo Code decoder and FPGA implementation. (5.18 MB)

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