Key detection based on FPGA
2016-08-23
0 0 0
no vote
Other
Earn points
Application background
Key Technology
The design using Verilog HDL prepared has strong portability and use state and realize value addend and meiotic conversion, digital tube is active low, & nbsp; & nbsp; two buttons for active low, FPGA in general application specific integrated circuit (ASIC) speed ratio to slow, to achieve the same function is larger than the ASIC circuit area. But they also have a lot of advantages, such as fast finished products, can be modified to correct the errors in the program and cheaper cost.verilog
fpga
检测
基于
按键
Related Source Codes
AXI Host Slave Function Model
0
0
no vote
Axi slave to fifo code
0
0
no vote
DMA Controller Based on AHB
0
0
no vote
Verilog implementation of ldpc code
0
0
no vote
Minimum sum decoding
0
0
no vote
No comment