Controller SDRAM
2016-08-23
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Application background
Controller RTL for the SDRAM level, by reading and writing state machine control, due to the SDRAM clock for verification of the maximum 133MHz, it uses 100MHz rate to write SDRAM, and then the SDRAM data into the FIFO, and then read from the FIFO data, displayed on the digital tube, FIFO is mainly used in the data cache, to avoid missing.verilog
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