Pulse compression processing based on linear frequ
2016-08-23
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Pulse compression processing based on linear frequency modulation signalFamiliar with debugging environment - hardware and softwareFPGA development based on VerilogHDL languageDebugging based on ChipScopeIntermediate frequency sampling of signalQuadrature demodulation based on multi phase filterSignal FIR filtering operation system integrationIn this experiment, the FPGA ADC is a computer controlled by USB3.0 to control the ARM in the LMK04808 to configure the ADC chip sampling frequency. (the IF sampling rate).First, the USB3.0 project is downloaded to the development board, and then through the USB3.0 configuration LMK and AD4249 chip, the specific operation in the FPGA of the manual (based on the realization of the ADS4294) in detail. Design Tool Clock file (corresponding to the 20M sampling frequency) through the my2.exe to load the LMK and AD4249 chip, and then use the signal generator to generate a 1M siverilog
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