Viterbi decoding based on FPGA
2016-08-23
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Upload file is based on the Viterbi FPGA decoding, the code used is Verilog. Viterbi decoding algorithm is a convolutional code decoding algorithm. Advantages not say. The disadvantage is that the complexity of the algorithm increases with the increasing of the length of the constraint. When the length of constraint is 7, the path of the N is 64, which is changed to 8. (2& lt; & lt; (N-1)). So Viterbi decoding is generally used in the constraint length of less than 10 of the occasion.
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