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FPGA core AES-GCM core 100G Ethernet Application

Application backgroundIn this paper we have presented an efficient design methodology to implement in reconfigurable hardware devices the GCM combined with the AES for authenticated encryption. Thanks to the replication of four AES cores and four binaryfield multipliers we were able to demonstra...

Improve the throughput of Karatsuba AES-GCM FPGA of the pipeline multiplier

Application backgroundIn this paper, we presented the throughput improvement of AES-GCM with pipelined Karatsuab-Ofman based finite field multipliers.With our proposed 4-stage sub-quadratic finite field multipliers, the GHASH function is not the bottleneck any more in GCM hardware systems, no mat...

FIR filter graduation design

Application backgroundFir (finite impulse response) filter: finite length unit impulse response filter, also known as non recursive filter is the most basic components of digital signal processing system, which can guarantee any amplitude frequency characteristics at the same time has strict linear...

Orthogonal Latin Square algorithm for fault detection

An error correcting and single stuck at fault detection code using orthogonal latin square is written in vhdl. The code can correct error upto 3 errors. The fault in syndrome generator error pattern calculator and roth1 generator can be detected using this code. Simultaneously the error is cor...

Flash NAND controller VHDL code

The information is based on the NAND flash FPGA controller research, language is VHDL, the code has been verified by simulation...


SVPWM pulse generation. VHDL code for Induction Motor...


SVPWM pulse generation. VHDL code for Induction Motor...

HDLC Protocol

FPGA implementation of HDLC Protocol, using the VHDL language, which is releasing the frame HDCL, sliced add external interfaces...

Radix-8 Booth Encoded Modulo

vhdl code for Radix-8 Booth Encoded Module  Multipliers With Adaptive Delay for High Dynamic Range Residue Number System...

vhdl code for different adders

A multiplier is one of the key hardware blocks in most digital and high performance systems such as FIR filters, digital signal processors and microprocessors etc. With advances in technology, many researchers have tried and are trying to design multipliers which offer either of the following- hi...

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