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HDB3 encoder

Based on FPGA as a hardware platform, QUARTUS II software platform based on EDA tools to achieve the HDB3 encoder/decoder. Because on the QUARTUS II EDA software platform cannot handle bipolar signals, and HDB3 encoder/decoder implementations include: software and hardware components. Piece is based...

The implementation of Hdb3 encoding based on FPGA

HDB3 code is a bipolar NRZ based on the improvement of the AMI code, not only does it have no DC component in the power spectrum, like the AMI code, and can be self-test error, etc., but also overcomes the time extraction difficulty when there is continuous "0" appears in the AMI...

FPGA drive a single lamp form dot matrix program

The program set up FPGA 5x5 dot matrix driver, the code is relatively simple, this program can be used as a FPGA output control, driving voltage stabilizing chip,and lighting...

spartan 3 VHDL time set and reverse counter with BCD

The spartan3 Starter Kit board is used to set time and Count down to 0.Each Digit is available to set by push button next_d. The value is able to change by button plus or minus.Switch 'start' is used to Count down the or set the time.The Display Shows hours and mins or Switch stt is 'on' it Sho...

High speed ADC control

Build environment for windows - xp; ISE12.4; using xilinx's V6 series FPGA control a high-speed AD ---- AD5463, this ADC is 12, the maximum sampling rate of up to 500MSPS, and configuration and wiring is simple, has a wide range of uses in the intermediate frequency radar signal processor.The source...

SDRAM Controller with Arbiter

SDRAM Controller for multi-CPU system with an arbiter which will schedule the memory access....

Calculator using 8085 assembly

Use the 7-seg LED display on-board (Address & Data fields) to display the Hours: Minutes: Seconds in decimal. This will mean you have a real-time clock running on the board. Also provide the following extra features (for incentive marks!!): (a) A timer facility (Provide Start and S...

Project: Elevator Controller

Your task is to design a sophisticated elevator controller for a single “conventional”  elevator (i.e., simple up/down buttons to call the elevator) operating in a four-floor  building. The specification for the basic single elevator design is described in the  sections below.&...

Design of FIR filter

IN implementation OFDM, there must be filter to improve the quality of radio signal. In general, the type of filter which is used in OFDM is FIR filter. FIR filter is convenient to use because linear-phase future.  So I research a bout it and implement FIR filter using VHDL language. This code...

Implementation SPI Interface In FPGA

In FPGA, implementation of serial interface such as SPI, I2C and ASI, is coming to force as the needs to realize interface between the peripherals. this project give the VHDL source implementing the SPI interface and documents related on them....

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