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VGA display and control

By FPGA displayed on your monitor a few stripes or patterns, requirements on CRT monitors can display horizontal stripes, vertical stripes and checkerboard lattice pattern. Experiment 50MHz system clock, choose clock module, controlled by one key module S1 display mode, press Next, the patterns on t...

Frequency generator based on FPGA

The program mainly for Altera, Xilinx FPGA series controlled frequency generator design, details of the program as described in the program notes section, program annotations in each part of the process....

Multi-function calendar design based on VHdl

Multifunctional digital Calendar basics – the VHDL hardware description language or description of fashion design. 1) design a calendar system, but the reality from seconds to years of counting; 2) due to open with only four-digit NIXIE tube, hence the need for function switching, using a button o...

FPGA stepper motors

Stepping Motor based on FPGA design of stepping motor controller based on FPGA in the analysis on the basis of the principle of stepping motor,Hierarchical design with VHDL program is given, and use the Quartus II simulation and simulation results are presented. It with the FPGA core devices, greatl...

Elevator system based on VHDL

Application backgroundBased on VHDL to realize the movement of four floors elevator, realize the normal operation of the elevatorKey TechnologyVHDL, state machine, compiler, trigger, comparator....

Aes_pipeline

Application backgroundThe pipelined architecture of the AES algorithm is proposed in order to increase the throughput of the algorithm.The inputs to the overall processor are as follows:  clk i: System Clock, Data I/O at rising edge  rst i: Asynchronous Reset, active high, initializes all input...

Digital Zhong Chengxu

Application backgroundDon't download the program by using VHDL language to design multifunctional multi-function digital clock, the design has, and seconds display function, the school and the whole point timekeeping function; system clock source module, frequency module, timing module, timing modul...

Xmatchpro lossless compression

Application backgroundThe Lossless data compression system is a derivative of the XMatchPro Algorithm which  originates  from  previous  research  of  the  authors  and  advances  in  FPGA technology. The flexibility provided by using this tec...

FPGA core AES-GCM core 100G Ethernet Application

Application backgroundIn this paper we have presented an efficient design methodology to implement in reconfigurable hardware devices the GCM combined with the AES for authenticated encryption. Thanks to the replication of four AES cores and four binaryfield multipliers we were able to demonstra...

Improve the throughput of Karatsuba AES-GCM FPGA of the pipeline multiplier

Application backgroundIn this paper, we presented the throughput improvement of AES-GCM with pipelined Karatsuab-Ofman based finite field multipliers.With our proposed 4-stage sub-quadratic finite field multipliers, the GHASH function is not the bottleneck any more in GCM hardware systems, no mat...

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