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reconfigurable fir filter vhdl code

this is an fir filter implementation code for a reconfigurable fir filter design coded in vhdl language...

VHDL for 16 bit Time Domain Convolution

Convolution is a common operation in digital signal processing. In this project, I created a custom circuit implemented on the Nallatech board that exploits a significant amount of parallelism to improve performance compared to a microprocessor. Convolution takes as input a signal and a kernell The...

8 bit CPU design


VHDL simulation of direct sequence spread spectrum communication system

size:14px;font-family:宋体;">直接序列扩频通信系统: 包含: 信源、扰码、交织、直扩、BPSK调制、解调、相关、解交织、解扰 等多个部分,经过QuartusII 9.0编译仿真验证可行。 代码全原创,内含系统报告手册一份。...

Study on Turbo Code decoder and FPGA implementation.

MAP algorithm for FPGA design and implementation. In Turbo yards of FPGA design and achieved part, main for has Turbo yards of compiled yards device in the all important module for has design and achieved, such as coding device in the RSC component decoder, and interwoven device, and decoder in the...

OFDM Modulation and Demodulation

size:14px;">Cyclic prefix insertion is commonly used in orthogonal frequency division multiplexing (OFDM) systems as a way  to mitigate the effects of intersymbol-interference (ISI). It copies the end section of an inverse fast Fourier  transform (IFFT) packet to the beginning...

Micron Nand Flash controller

size:14px;">containing ECC function...

VHDL realization of 3*3 matrix multiplication

Matrix multiplication vhdl implementation, dimension fixed, very instructive.Focus on understanding the interface, timing settings, delay control. Because the structure is relatively clear, not added stimulus file, you can write your own....

LED blink code in VHDL

space:nowrap;">LED blink code in VHDL...

16/64 point FFT

space:nowrap;">捻因子、 ROM、 RAM 和等等。它可以成功运行在 Quartus 2 或其他软件上。...

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