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turbo coder

CHAPTER2LUT-LOG-BCJRARCHITECTUREThe energy consumption of conventionalLUT-Log-BCJR architectures cannot be significantly reduced by simply reducingtheir clock frequency and throughput. This motivates our novel architecture ofimplementing the basis ACS circuit in the system which is specifically desi...

Realization virtual electric piano based on VHDL

This program design using VHDL language virtual keyboard. Hammond organ design consists of four modules: play module keyplay, auto play module AutoPlay, check gauges and display module table and frequency module fenpin. Plays modules keyplay under the key key indicates the pitch index_key; auto...

Numbers and Displays - DE2-115

This is an exercise in designing combinational circuits that can perform binary-to-decimal number conversion and binary-coded-decimal (BCD) addition....

Study on Turbo Code decoder and FPGA implementation.

Altera Quartus II software platform completed the decoding of Turbo codes based on Log-MAP algorithm for FPGA design and implementation. In Turbo yards of FPGA design and achieved part, main for has Turbo yards of compiled yards device in the all important module for has design and achieved, such as...

Intel 8085 Microprocessor design using VHDL

The design of Intel 8085 Microprocessor using VHDL. ...

8 bit CPU design

Application backgroundThe use of quartus7.2 for the 8 bit shift CPU design, can make a thorough understanding of the CPU design, function and so on. The basic components of the CPU are operational components, register sets, micro commands, and timing systems. These components are connected by the CP...

FPGA OV5640 driver code

This experiment in AX301 Development Board, for example, need to be 1024*720 like OV5640 depending on the size of the frequency output images to a display on a VGA monitor, on the program after the OV5640 register is set, then acquisition camera images stored in SDRAM, then removed the images from S...

high speed ADC-ADC08D1000 comunication in FPGA

This is a program developed by Arron lee, in order to control ADC08D1000 Analog-to-digital device in FPGA, Xilinx Virtex-4 SX35 FPGA is applied here, the DCM is used to control the clock path in FPGA, the clock source is AD9517 which controled by serial port in FPGA...

AES 128 Crypto Core

Mini AES Advanced Encryption Standard (AES) implementation with small area/resources utilization. Features - Encryption and Decryption unit in single core....


This book is for developers who are involved with designing or programming devices that use the Universal Serial Bus (USB) interface. If you are a hardware designer, if you write firmware that resides inside USB devices, or if you write applications that communicate with devices, this book is for...

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