Sort by
  1. Language:All
  2. Category:vhdl
  3. Time:ALL
  4. View:500—1000 times
Remove all
Language More Hide
Category More Hide

reconfigurable fir filter vhdl code

this is an fir filter implementation code for a reconfigurable fir filter design coded in vhdl language...

16/64 point FFT

This is a FFT library function by using VHDL code. It can switch the length of FFT between 16 point and 64 point. It contains the butterfly, twiddle factor, ROM, RAM and so on. And it can successfully run on Quartus 2 or other software....

OFDM Modulation and Demodulation

Cyclic prefix insertion is commonly used in orthogonal frequency division multiplexing (OFDM) systems as a way  to mitigate the effects of intersymbol-interference (ISI). It copies the end section of an inverse fast Fourier  transform (IFFT) packet to the beginning of an OFDM s...

Micron Nand Flash controller

The controller micron companies, it is a reference nature, with the flash of shoes can download the reference,  containing ECC function...

VHDL simulation of direct sequence spread spectrum communication system

Direct sequence spread spectrum communication system : Contains: 信源 、 扰码 、 交织 、 直扩 、 BPSK 调制、 解调 、 相关 、 Interwoven solutions for 、 解扰 Several parts through QuartusII 9 compiler testing is feasible. Code original containing syste...

Discrete Cosine Transform(DCT/IDCT) in VHDL

the Project aim is to design DCT and IDCT in VHDL. DCT is used in image compression to compress the JPEG image. This file contains DCT and IDCT blocks and top module which integrates two blocks and testbench to test the two modules....

Waveform generator and sine waveforms generator based on VHDL language

Waveform generator and sine waveforms generator based on VHDL language, a total of two files, communication development platform. This is a typical black wave generator program and an arbitrary waveform generator program, members can refer to the study, introduction to VHDL is also helpful to-This i...

VHDL4 buzzer

4 people for answering system, time of 20 seconds, 20 seconds no one answer is deemed no one answering. Before you start answering as a violation vie, violation vie warns players. If there is one person answering the other 3 locks, can no longer answer. aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa...

VHDL Design of 16 Radix 4 point FFT

Design and functional implementation of a 16-point pipelined FFT architecture is presented.  The architecture is based on the radix-4 algorithm.  By exploiting the regularity of the algorithm, butterfly operation and multiplier modules were designed.  The architect...


Don't have an account? Register now
Need any help?
Mail to:


CodeForge Chinese Version
CodeForge English Version

Where are you going?

^_^"Oops ...

Sorry!This guy is mysterious, its blog hasn't been opened, try another, please!

Warm tip!

CodeForge to FavoriteFavorite by Ctrl+D