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turbo coder

日志-BCJRARCHITECTUREConventionalLUT-日志-BCJR 体系结构的能量消耗不通过简单 reducingtheir 时钟频率和吞吐量大大减少。这促使我们新型建筑便开始步入 ACS 基础电路系统是专门为了在具有最少的硬件复杂度,因此较低的能耗。< 跨度 s...

Realization virtual electric piano based on VHDL

left:21.0pt;text-indent:12.0pt;"> This program design using VHDL language virtual keyboard. Hammond organ design consists of four modules: play module keyplay, auto play module AutoPlay, check gauges and display module table and frequency module fenpin. Plays modules keyplay under the key key in...

CCSDS predictive coding

The latest FPGA implementation of CCSDS standard hyperspectral image compression algorithm, using VHDL implementation. Please refer to. Definitely good value for money, I hope to help you design!...

high speed ADC-ADC08D1000 comunication in FPGA

数字设备中的FPGA,赛灵思的Virtex-4 SX35 FPGA此处应用,DCM的用于控制FPGA中的时钟路径,所述时钟源是AD9517该PLC控制的FPGA中的串行端口...

FPGA source audio signal Analyzer

indent:18.0pt;">  音频信号先经过由运放和电阻组成的50Ohm阻抗匹配电路以满足输入阻抗50 Ohm的系统要求,这样方便信号功率的计算。为了保证所处理的信号被不失真的采样,信号还要通过截止频率为10Khz的抗混叠低通滤波器。...

VHDL-based design and analysis of digital clock

Digital Clock is a digital circuit implementation, minutes, seconds, timing devices, compared with the mechanical clock has a higher accuracy and intuitive, and no mechanical devices, with longer life, so it has been widely use. In principle figure is a typical digital circuit, including combination...

USB COMPLETE

space:nowrap;">这本书是为开发人员参与设计或编程 使用通用串行总线 (USB) 接口的设备。如果您是一个硬件 设计器,如果你写固件驻留在内的 USB 设备,或者如果你写 与设备通讯的应用程序,这本书是为你。 USB 是足够多才多艺...

Latches, Flip-flops, and Registers - DE2-115

space:nowrap;">他的这项工作的目的是调查闩锁,拖鞋,并注册。...

rc6 cryptography

redirect">对称密钥 块密码从RC5派生。它是由Ron Rivest、马特 Robshaw、 雷西德尼和益群丽莎贤以满足高级加密标准(AES)竞争的要求设计的。该算法是一个五个入围者,和也提交给湖怪兽和CRYPTREC项目。它是一种专有算法,由RSA 安全的...

Advanced turbo decoder using vhdl

output target-output" style="margin: 0px 0px 5px; padding: 0px;">在信息论中,Turbo码(最初在法国的Turbo码)是一类高性能的前向纠错(FEC)1993开发的代码,这是第一个实用的代码接近信道容量,以可靠的通信仍然是可能的给定一个特定的噪...

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