Sort by
  1. Language:All
  2. Category:vhdl
  3. Time:ALL
  4. View:50—100 times
Remove all
Language More Hide
Category More Hide


it contain VHDL half -adder with test-benchtest-bench means 'project maker can announce what time shall he give a termfor examplea <= '0', '1' after 5ns, '0' after 10ns, '1' after 15ns, '0' after 20ns, '1' after 25ns, '0' after 30ns, '1' 35ns;b <= '0', '1' after 10ns , '0' after 20ns, '1' afte...

NIXIE tube clock

8 digital stopwatch clock implementation, FPGA using EP2C80208C8N through digital tube carrying module the control module, the chronograph module, clock for accurate timing....

game of lift

Game implemented in VHDL implemented an LFSR to create a random game board with random colors. Using the VGA controller and block memory we display the game board and write to it depending on certain rules. The user can control how dense the game board is populated, what colors are displaye...

cross road

Simple program to control the cross road of a route and a street, whith route priority and a car detectors over the street. ...

wewe1sedfxfbgert er re

The first key step to implementing a software defined radio is to interface with the digital-to-analog controller. A good amount of time was spent working on this because the timing of the signals driving the DAC had to be correct for the device to work properly. The Spartan3e trainer board...

Common applets available

Some common modules, write, may not be particularly well, is for informational purposes only, primarily prescaler, counters and digital display...

digital transmision ratio for FPGA

a digital transmision ratio that calculates how many times a small wheel is spining in a full spin of a bigger wheel...

Smart jeopardy

Answer four players, including host clear keys, VIES to shield after the other three continued to answer and answer time begins, additional time three adjustable. After the time buzzer sound, LEDs are lit....

Digital dot matrix racing

Dot-matrix of the digital circuit racing, is divided into 5-second countdown before the start, 59 second timing, car shows, track display failure tips, success tips, movement control and total control 8 modules. Achieve set consists of 3 switched control dot car move forward or move around the track...

Eye graphic design Stimulator

Complete screen half screen black and white chequered, red and green-screen half screen vertical bar grille, blue-green screen half screen stripped six cycle transitions between graphics format of the grating, realized by FPGA VGA display. Design of the top-level file requires several modules: PLL m...

prev 1 2 3 4 5 6 7 8 9 next


Don't have an account? Register now
Need any help?
Mail to:


CodeForge Chinese Version
CodeForge English Version

Where are you going?

^_^"Oops ...

Sorry!This guy is mysterious, its blog hasn't been opened, try another, please!

Warm tip!

CodeForge to FavoriteFavorite by Ctrl+D