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NIXIE tube clock

8 digital stopwatch clock implementation, FPGA using EP2C80208C8N through digital tube carrying module the control module, the chronograph module, clock for accurate timing....

99 multiplier

Based on written on ROM, 99 implementation of multiplier over the quartusII, displayed in test chambers on four digital multiplier and multiplicand, the plot...

1 Bit Full Adder using Structural method

1 Bit Full Adder using Structural method in VHDL.Basically in VHDL we can design code by three methods like data flow, structural and behavior.In structural design individual gate is being mapped. it is a type of Full Custom Design....

Distributed arithmetic

DA implementation used for the implementation of an FIRfilter assumes that impulse response coefficients are fixed,and this behavior makes it possible to use ROM-based LUTs...

Rate generator

Application background Generic module to generate reconfigurable baud rate from source clock frequency. This module can be used for UART, Custom Serial Protocols etc. Povides a CLK generator module to generate selectable  -- baud rates  -- clk source(with selecta...

A chain Merkle signature encryption processor architecture

Application backgroundOne-time signature schemes rely on hash functions and are, therefore, assumed to be resistant to attacks by quantum computers. These approaches inherently raise a key management problem, as the key pair can be used only for one message. That means, for one-time signature sche...

An effective high throughput FPGA AES multi Gigabit protocol

Application backgroundIn this paper, we have presented an efficient nonpipelined implementation of AES-128 to achieve high throughput so that it can be used in gigabit protocols. We have implemented our design of AES-128 encryption and decryption on a Xilinx Virtex-7 FPGA and achieved throughpu...


Application backgroundthis code is useful for actuator and sensor in can network for fulfill a good connection with other node and master.Key Technologyvhdl code  -can controller- bit stuffing- crc- checksum - mask - acceptance code...

VHDL, C from a c c e p a C are from a series of studies. C, C, C E. From the scene of a C, P E T c c c in energy-saving.

Application background На рисунке 1 показана цифровая система, которая состоит из нескольких 9-разрядных регистров, мультиплексора, блока суммирования-вычитания и блок упра...


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