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SPI flash model written by verilog

M25Pxx ST company SPI flash memory Verilog simulation model, the model correctly describes the behavior of SPI flash memory, including reading, writing and erase operations, can be used to hang outside of the SOC with SPI interface, verify that the SPI interface....

FPGA Verilong Ethernet

Under the fpga, written entirely verilong Ethernet program that can be tcp / IP communications, please do not use in commercial applications, thanks...

FFT FFT algorithm based on Verilog

This code implements 128 points, FFT calculation of 16-bit integers, Quartus II version 8.0, as verified by simulation, timing constraints and practical verification program features can fully meet demand under normal circumstances, clocking 150Mhz....

Realization of image median filtering FPGA

The realization of image algorithm based on FPGA, including the verification of the algorithm of MATLAB is implemented in the FPGA algorithm, using Xilinxdevelopment environment, verified by....

Implementation of Pipeline 2D-DCT for MPEG Compression

The 2-D DCT transforms a block of N x N pixels from the spatial domain into the frequency domain. Before compression, image data in memory is divided into several blocks. Each block consists of 8x8 pixels. Fig. 2 shows that in the resulting coefficient block, the coefficient in t...

HDMI interface chip (ADV7513) drive, 1080p60,720p60 colour bar test!

This engineering achieved has HDMI chip of configuration and drive test, can selective configuration for 1080P60,720p60,ddrmode, mode, 1080p60 and 720p60 format of video image now is mainstream format, and ddrmode can greatly save FPGA Shang valuable of tube feet resources, this engineering can sele...

Verilog HDL design and development laboratory

The most detailed collection of Verilog examples, rapid entry to the master. As an experimental tutorial this tutorial is divided into two parts: the FPGA hardware system based on Verilog and advanced interface design experiments. For the beginner can quickly get started. For those who have come int...

Gigabit network programs available from Altera Corporation

The source code download Altera official website, providing 3C120 for use with Altera Corporation Board, but the program can still draw on Gigabit Ethernet. It uses the IP provided by Altera Triple-Speed-Ethernet nuclear Qsys-system is constructed, and then write programs in nios2....

Floating Multiplication in Verilog FPGA

The design of digital multiplier has received increasing attention as it becomes an indispensable part of modern computer. The paper introduces the design of a floating multiplier based on the compensate shifting in the hardware description language. The design can fulfill full function an...

FPU Floating point unit verilog VHDL

FPU (Floating Point Unit) is very useful in the moden ASIC and SOC designs. This module has been verified by FPGA and EDA env. But if you want to use it in a real project, please verify it with some formal method. ...

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