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Verilog code for the GPS baseband processing

GPS software receiver baseband processing Verilog programs, by spread spectrum demodulation, intermediate frequency data synchronization process converts the raw navigation data...

Realization of image median filtering FPGA

The realization of image algorithm based on FPGA, including the verification of the algorithm of MATLAB is implemented in the FPGA algorithm, using Xilinxdevelopment environment, verified by....

Cache memory

This code is the code cache, using the least recently used algorithm. Roughly 1000-2000 lines of code, the program includes cache replacement algorithm implementations. Selection of image rules, as well as all of the simulations....

H264 IP core written in Verilog

A well-written H.264/AVC Baseline Decoder IP core. Usage instructions can be found under directory : trunk/doc/nova_spec.doc Also contains testbench file. Extremmely easy to understand....

SPI flash model written by verilog

M25Pxx ST company SPI flash memory Verilog simulation model, the model correctly describes the behavior of SPI flash memory, including reading, writing and erase operations, can be used to hang outside of the SOC with SPI interface, verify that the SPI interface....

AXI slave Verilog implementation of agreements

AXI (Advanced eXtensible Interface) is a bus protocol, which was proposed by the ARM company AMBA (Advanced Microcontroller Bus Architecture) 3.0 protocol for the most part, is a high-performance, high-bandwidth, low-latency-oriented films Internal bus 。 It addresses/separation of control and data...

Implementation of Pipeline 2D-DCT for MPEG Compression

The 2-D DCT transforms a block of N x N pixels from the spatial domain into the frequency domain. Before compression, image data in memory is divided into several blocks. Each block consists of 8x8 pixels. Fig. 2 shows that in the resulting coefficient block, the coefficient in t...

FPGA Verilong Ethernet

Under the fpga, written entirely verilong Ethernet program that can be tcp / IP communications, please do not use in commercial applications, thanks...

Four ov7670 camera image acquisition and VGA display system based on FPGA

Application backgroundApplication in multi - channel image parallel acquisition and display.Key TechnologyBased on the FPGA image processing development board completed a four way image acquisition, and send VGA sub screen display, the program is written in the Verilog hardware language, the camera...

High efficiency LDPC code encoder FPGA development, VerilogHDL, and MATLAB simulation

Application backgroundWIMAX standard uses LDPC code as its optional channel encoding program. The WIMAX standard is the fourth global 3G standard for ITU, WCDMA, CDMA200, and TD-SCDMA in 2007. LDPC code with its excellent error correction performance has become a hot research topic in recent years....

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