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Gaussian Random number generator (hardware implemented)

This is hardware implemented Gaussian random number generator based on the article attached in the folder "Document" The system is based on the Ziggurat Gaussin random algorithm and implemented when I was under-graduate. Although it is not my original system, it is so helpful cause I can acquire a...

amba apb v2.0

amba apb protocol v2.0 verilog  and datasheet...

FPGA实现UART接收和发送

在fpga中实现实现了UART的功能,经过实际在ep4cE6 fpga上下载测试,发现可以准确的接收个发送串口数据,和板子上的单片机uart通信正常。要使用的小伙伴,可以直接拷贝使用。...

FPGA控制步进电机的Verilog程序

FPGA控制步进电机的程序,带有加减速,方向控制,速度可调。并且有SPI接口,由状态机控制电机的加减速,电机运行步数可控。...

N-clock Divider

Verilog Code for N-Clock Divider. An N-Clock divider is used to synchronize the frequencies for different machines....

Dual Port RAM

This is the Verilog Source Code for Dual Port RAM. Dual-ported RAM (DPRAM) is a type of random-access memory that allows multiple reads or writes to occur at the same time, or nearly the same time, unlike single-ported RAM which only allows one access at a time....

N-clock Divider

Verilog Code for N-Clock Divider. An N-Clock divider is used to synchronize the frequencies for different machines....

Synchronous Four Bit Counter

Program for four bit counter on Verilog. it is a synchronous counter, hence no ripple and counts from 0 to 15. It can be extended to count up to any number as well....

Priority Encoder

Verilog Code for priority encoder.  The priority encoders output corresponds to the currently active input which has the highest priority. So when an input with a higher priority is present, all other inputs with a lower priority will be ignored....


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