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Motor SVPWM speed control VHDL source code

This is a motor SVPWM Speed control VHDL source code control procedures, including the main program and test rtl simulation program sim...

turbo coder

CHAPTER2LUT-LOG-BCJRARCHITECTUREThe energy consumption of conventionalLUT-Log-BCJR architectures cannot be significantly reduced by simply reducingtheir clock frequency and throughput. This motivates our novel architecture ofimplementing the basis ACS circuit in the system which is specifically desi...

h264 encoder

h264 encoderthis encoder referance with open cores.support baseline profile and I - frame.640X480 picture support tested operation clock up to 100Mhz with Xilinx ....

Realization virtual electric piano based on VHDL

This program design using VHDL language virtual keyboard. Hammond organ design consists of four modules: play module keyplay, auto play module AutoPlay, check gauges and display module table and frequency module fenpin. Plays modules keyplay under the key key indicates the pitch index_key; auto...

Numbers and Displays - DE2-115

This is an exercise in designing combinational circuits that can perform binary-to-decimal number conversion and binary-coded-decimal (BCD) addition....

FPGA VGA display experiments

This is an original VGA interface generation code. Is allowed to experiment in a certain size of image displayed on the computer monitor. Full realization of FPGA and PC monitors of the same letter. Code design is original....

Study on Turbo Code decoder and FPGA implementation.

Altera Quartus II software platform completed the decoding of Turbo codes based on Log-MAP algorithm for FPGA design and implementation. In Turbo yards of FPGA design and achieved part, main for has Turbo yards of compiled yards device in the all important module for has design and achieved, such as...

Nios SD card read/write

This code describes the Nios SPI nuclear control SD card method, with the most simple way to achieve SD card read/write operations for beginners to understand SD card the operation, including one document describes the process of SD card driver and Verilog code. This code was developed based o...

high speed ADC-ADC08D1000 comunication in FPGA

This is a program developed by Arron lee, in order to control ADC08D1000 Analog-to-digital device in FPGA, Xilinx Virtex-4 SX35 FPGA is applied here, the DCM is used to control the clock path in FPGA, the clock source is AD9517 which controled by serial port in FPGA...

H264 motion estimation in VHDL

H264 estimation algorithms, VHDL description, detailed Readme document from github. FPGA and SOC can have a try....

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