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这是我用verilog hdl语言写的浮点乘法器,用的是基4的booth算法,对于部分积使用了5...

2压缩和3-2压缩,欢迎大家指点,也欢迎大家把它改成流水线以提高速度.-This is my verilog hdl language used to write floating-point multiplier, using a Radix-4 algorithm for the booth for part of the plot using the 5-2 and 3-2 compression compression, welcomed everyone pointing,...

This the source code for PIC(Programmable Interrupt Controller) which is used in...

This is the source code for PIC(Programmable Interrupt Controller) which is used in computer interface...

This is the source code of AES algorithm which is used in network security.

This is the source code of AES algorithm which is used in network security....

Traffic lights at the EDA design

This is the source of traffic light design of EDA experiment and report detailing the procedures for using qurtus   principle and source specific can learn from the experimental university textbooks...

vhdl adder

Our project is based on automating the atm card security  and security operations involved in anorganization. Earlier, there was the conventional swiping system using bar codereaders. Now, it can be carried using non-contact devices, with the help ofRadio Frequency Identification (RFID). RFID c...

Quaternion operations

size:14px;">该代码实现了四元数在FPGA上的加法运算,并且包含了串口传输程序,包括串口入和串口出程序,可移植性强。针对CycloneIII240的FPGA可直接使用,只需下载一个串口精灵便可调试,当然了,使用波形仿真也是可以验证的。...


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