▍3des加密算法实现,经过FPGA验证的!
3des encryption algorithm, after FPGA validation!...
3des encryption algorithm, after FPGA validation!...
this DES made by verilog...
The source described the hardware DES encryption algorithm realize the way language...
based design, has a certain reference value, a more detailed written...
this is a vhdl program for crc encoder and decoder...
VIP account is provide a way to those who do not want upload code to download...
des encryption algorithm used for IP communications.the source codes are written in VHDL...
Universal Asynchronous Receiver...
CRC code generator and calibration program Features: Executes in one clock cycle per data word Any polynomial from 4 to 32 bits Any data width from 1 to 256 bits Any initialization value Synchronous or asynchronous reset...
like form All needed components up to, including the round/key schedule circuits are implemented, giving the flexibility to be combined in different architectures (iterative, rolled out/pipelined etc). Manual in English is included with more details about how to use the components and/or how to opti...