▍3des加密算法实现，经过FPGA验证的！
3des encryption algorithm, after FPGA validation!...
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▍this DES made by verilog
this DES made by verilog...
▍The source described the hardware DES encryption algorithm realize the way langu
The source described the hardware DES encryption algorithm realize the way language...
▍基于FPGA的crc设计，有一定的参考价值，写的比较详细
based design, has a certain reference value, a more detailed written...
▍this a vhdl program for crc encoder and decoder
this is a vhdl program for crc encoder and decoder...
▍VIP account is provide a way to those who do not want upload code to download
VIP account is provide a way to those who do not want upload code to download...
▍des encryption algorithm used for IP communications.the source codes are written...
des encryption algorithm used for IP communications.the source codes are written in VHDL...
▍Universal Asynchronous Receiver
Universal Asynchronous Receiver...
▍CRC码产生器与校验器程序 Features ： Executes in one clock cycle per data word Any po...
CRC code generator and calibration program Features: Executes in one clock cycle per data word Any polynomial from 4 to 32 bits Any data width from 1 to 256 bits Any initialization value Synchronous or asynchronous reset...
▍VHDL implementation of the twofish cipher for 128,192 and 256 bit keys. The im...
like form All needed components up to, including the round/key schedule circuits are implemented, giving the flexibility to be combined in different architectures (iterative, rolled out/pipelined etc). Manual in English is included with more details about how to use the components and/or how to opti...
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