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用Verilog编写的一个简单的产生伪随机序列的代码(m序列),比较实用。...

Verilog prepared with the emergence of a simple pseudo-random code sequence (m sequence), more practical....

激光测速研究,主要介绍多普勒激光测速知识

Laser velocimetry study introduces laser-Doppler velocimetry knowledge...

一个自动售邮票的控制电路。 用两个发光二极管分别模拟售出面值为六角和八角的邮票,购买者可以通过开关选择一种面值的邮票,灯亮时表示邮票售出。用开关分别模拟一角、五...

An automatic control circuit sell stamps. With two light-emitting diodes were simulated sold hexagonal and octagonal face value of the stamps, the purchaser can select a switch with a face value of stamps, stamp lights that were sold. Analog switch, respectively, of the iceberg, the Pentagon and one...

In design of large

In design of large-scale access convergence router(hereafter referred to ACR) forwarding engine, the Xilinx Virtex-4 FPGA!s RocketI/O r multi-gigabit transceiver is used to satisfy the need of high speed and steady interface between forwarding engine and switch fabric. This pape proposes an assis...

本例源代码文件由用户按照书中的操作步骤自己生成,“Example...

In this case the source code files by the user in accordance with the steps the book itself is generated, "Example-2-1 Project_Navigator_Demo source" directory as the source code reference document. "Example-2-1 Project_Navigator_Demo counter" directory for a complete project, including source c...

many matlab code with Fftseq ,uniform to gauss AM DSB FM modulation

many matlab code with Fftseq ,uniform to gauss AM DSB FM modulation...

Matlab code to simulation the wireless channel type.This is the most common case...

Matlab code to simulation the wireless channel type.This is the most common case called Rayleigh channel.And in the frequency selective channel....

VHDL code for Adder / Subtractor

LIBRARY ieee; USE ieee.std_logic_1164.all; USE ieee.std_logic_unsigned.all; ENTITY adder IS PORT(Cin        : IN STD_LOGIC; Carry        : IN STD_LOGIC;  X,Y        : IN STD_LOGIC_VE...


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