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Digital demultiplexer

size:12.0000pt;font-family:'宋体';">本文设计的数字分接器是由帧同步提取模块、位同步提取模块、帧同步移位和时序信号恢复模块、分路器模块、串/并转换电路模块五部分组成。 由同步、定时、分接和恢复单元所组成。同步单...

FSMD with reg,mux,fib

An FSMD impemented in VHDL, with a mux,reg,fib function, tested on xilinx ide and implemented into fpga...

4 bit counter

This is a simple vhdl code for counter with synthesizeble xilinx ise project. It is a four bit counter used test on xilinx spartan 6 lx9 fpga implemented on sparten 6 lx9 microboard....

adder in verilog

this contains adder code in  vhdl. so use it carefully. u can perform large number number of operation using it,...

8051 kernel VHDL source code

This is a great god with 8051 kernel VHDLL language description, very practical, upload here the hope can help you, also can get points, source code is very complete, we provide a good reference in learning, through the study of blame your mother believe that you will be more interested in the kerne...

counter with led

this code is in vhdl language  on fpga 3e 2 basys that's a counter with led and descounter with switcher...

802.3an LDPC decoder

space:nowrap;">802.3an协议的LDPC解码器, 用VHDL语言编写,基于Gallager算法...

RSC Reed Solomon encoder for turbo encoder


vhdl code for turbo encoder ( LTE Process)



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