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Realize with a VHDL design of traffic lights with light display and a countdown

Realize with a VHDL design of traffic lights with light display and a countdown function...

此程序在于,调用ISE中自带的DDS__IP,来产生单正弦信号,该程序已通过布线后仿真实现...

The program focus on that it utilize the DDS core embedded in the ISE to generate the sigle sinusoid signal and this program have acess to the posted simulation!...

8位全加器的VHDL语言描述,有需要的顶一下。

8-bit full adder described in the VHDL language, there is a need to click the top....

Authentication function of the 74181,through simulation

Authentication function of the 74181,through simulation...

用74181和74182设计的一个8位运算器 已通过仿真

Designed by 74181 and 74182 of an 8-bit arithmetic logic unit has been through simulation ~~~~~~~~~~~~~~~~~~~~~...

基于VHDL的M序列发生器~大家可以作为参考试用看

VHDL-based M-sequence generator ~ everybody can watch the trial as a reference...

In this paper, we present two encoding methods for block

In this paper, we present two encoding methods for block-circulant LDPC codes. The first is an iterative encoding method based on the erasure decoding algorithm, and the computations required are well organized due to the blockcirculant structure of the parity check matrix....

This article describes the digital frequency of the design process, which includ...

This article describes the digital frequency of the design process, which includes the use of language VHDl source code, graphics and simulation, which is a more complete description of the design of digital frequency meter article...


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