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The program focus on that it utilize the DDS core embedded in the ISE to generate the sigle sinusoid signal and this program have acess to the posted simulation!...

Realize with a VHDL design of traffic lights with light display and a countdown

Realize with a VHDL design of traffic lights with light display and a countdown function...

eMMC 4.41 Specification

Embedded MultiMediaCard(e•MMC) e•MMC/Card Product Standard, High Capacity, including Reliable Write, Boot, Sleep Modes, Dual Data Rate, Multiple Partitions Supports and Security Enhancement (MMCA, 4.4) JESD84...


bit full adder described in the VHDL language, there is a need to click the top....

Authentication function of the 74181,through simulation

Authentication function of the 74181,through simulation...

用74181和74182设计的一个8位运算器 已通过仿真

bit arithmetic logic unit has been through simulation ~~~~~~~~~~~~~~~~~~~~~...


sequence generator ~ everybody can watch the trial as a reference...

In this paper, we present two encoding methods for block

circulant LDPC codes. The first is an iterative encoding method based on the erasure decoding algorithm, and the computations required are well organized due to the blockcirculant structure of the parity check matrix....


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