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DE2_70_D5M_LTM

DE2_70_D5M_LTM mainly in the DE2-70 development of a video capture and LTM displayed on the platform process, the platform can be used as image processing and graphics hardware, the system can be improved and extended, such as video surveillance systems...

Simple 32bit RISC CPU core

I am INHA Univ student at South korea. This is project result of coumputer architecture.IT's CPU Core, 32bit RISC system. It can be opreated at 300 MIPS. 1cycle / 1instruction system.It propose Simple Harvard Architecture. and Do simple Arithmetic logic....

micro sd card interface(sdmode)

This code implements an SD card interface driver functions is realized in sdmode read and write rates of 50Mbps, you can also add additional commands to sketch rates of 100Mbps, and file systems can be realized in this interface easily on the basis, so as to achieve the required functionality for yo...

IFFT xlinx ISE development

IFFT procedures implemented in Verilog programming language, Xilinx is the device, the development environment is the ISE, pipelined, worth downloading experience, butterfly using base 2 decomposition can be used for digital filtering, signal processing and other fields, hoping that we can support ....

Image scaling IP

Video scaling and processing IP, has the following characteristics: 1. Maximum support 1280x1024 input/output 2. Horizontally scales the range from 0.25 to 4, vertical scale ranging from 0.33 to 4;3. Support replication, bilinear interpolation and bicubic interpolation algorithm for three; 4. Users...

Time measurement based on FPGA and AD a/d conversion

This is our school curriculum topics, code using the Verilog language on FPGA is used to write the given distance and other parameters of the measurement of time and receives the analog transmitter AD and DA conversion.  Among them, the technical indicators are as follows AD sample rate: 1GSPS,...

coventional dct using verilog

this program is used to calculate the discrete cosine transform of an image. the method used to perform dct is the conventional   row -column . dct is very important in image processing to trnasform an image from spatial domain to frequency domain. the program comment will help you to unde...

FPGA'for' cycle

Written in the Verilog language for circulation and used to verify whether in the FPGA can writing a for loop in c, it turned out although the emulation to get the right result, but in real engineering are not compile-time takes 24 hours to complete, so I chose another method to loop through, after...

Note player

A simple implementation of a note player using veriolog. The code consists of two modules and can play three noes three notes. It is very easy to understand and expand....

Turn RGB2S RGB s

RGB transfer code s components in HSI, video enhancement algorithm that is used in the conversion, according to this algorithm can be transplanted to the FPGA, implemented in the FPGA....

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