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▍Viterbi decoder 2-1-7

viterbi decoding algorithm is a decoding algorithm for convolutional codes. Advantages not say. Drawback is bound to increase with the complexity of the algorithm is to increase the length of the fast. N is the path length constraint 7:00 to compare 64 there, the path goes to 8:00 128. (2 << (...

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1184

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3 years ago

by talent_zhy

Algorithm Verilog

▍FPGA implementation of QPSK modulation and demodulation algorithm code

The algorithm for QPSK modulation and demodulation carrier using Costas-loop synchronization algorithm, algorithm for bit timing by Gardner...

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1255

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3 years ago

by chenpuyue

算法 Verilog

▍OFDM implementation of FPGA algorithm

Application backgroundCyclone 4 on OFDM algorithm, the carrier number 64, the source bit PN9 1.024Mbit/s pseudo random sequence, the first 4bit a group through the symbol mapping module map 16QAM symbol, a set of 64 symbols for IFFT operations, the results of serial output, through the digital outpu...

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1509

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3 years ago

by chenpuyue

算法 Verilog

▍Verilog code for RS encoding and decoding

里的所罗门RS编解码方案，建立工程后可直接编译调试，对于学习RS编码原理的人员可以作为一个例子学习，也可以应用于相应的系统中...

3 years ago

算法 Verilog

▍ Verilog language implementation of AES advanced encryption algorithms

&Nbsp;AES Verilog language implementation of advanced encryption algorithms...

3 years ago

算法 Verilog

▍AES algorithm Verilog code

Application backgroundAES encryption algorithm, Encryption Standard Advanced (AES), also known as the Rijndael encryption method, is a block encryption standard used by the federal government. This standard is used to replace the original DES, has been analyzed and widely used in the world. After fi...

3 years ago

算法 Verilog

▍HDMI display

About HDMI display, Verilog language, with 1280*720 resolution, different images can be achieved by adding your own logic, specific uses described in the annex, HDMI display SiI9134 driver chip, very good compatibility with different data formats....

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1323

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3 years ago

by 070411209

Algorithm Verilog