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Ethernet communication design Siga-S16FPGA Development Board

Siga-S16 based on Xilinx Spartan6 XC6SLX16 FPGA Development Board Ethernet communications. This test comes back to form, namely FPGA accepted process to PC (computer) sends UDP packets to resolve destination Mac address to determine if this is the packet to the FPGA. If that is the case, put the pac...

GPSR(Homemade GPS Receiver)

I was motivated to design this receiver after reading the work of Matjaž Vidmar, S53MV, who developed a GPS receiver from scratch, using mainly discrete components, over 20 years ago. His use of DSP following a hard-limiting IF and 1-bit ADC interested me. The receiver described here works on the s...

Ethernet for FPGA-PC communication

Description: This projectwas to design an interface that enabled the FPGA board to communicate withother devices via the on-board Ethernet connection.Responsibility: Design of 10Base T Ethernet MAC has been done in verilog and implemented the same onSpartan 3E FPGA Board. ...

Verilog simulation of digital stopwatch for source

1 . 具有暂停/启动功能;2. With resume function;3. 6 digital tube display hundreds of seconds, seconds and minutes. Solution : On request, using a bottom-up design approach, opting for max+plus2 For editing and debugging. The whole is divided into two sections: one is co...

Design and realization of digital cymometer based on Verilog HDL

Design and realization of digital cymometer based on Verilog HDL, complete engineering documents, the design meets the following requirements:(1) digital display frequency values(2) measuring deviation is less than 0.1%(3) testing of sine or square wave signal for the following 10kHz(4) square wave...

AES 256 encryption engine, 4 input pipeline

this code is one diffrent implementation of AES-256.this code encrypt 4 different input data 128 bit with 4 different key 256 bit for each dataall encryption data generate after 67 clock cyclewe implement this engine of Xilinx Virtex 4 xc4vlx25 FPGAthe result shown in below table xc4vlx25Propos...

FPGA XILINX serial debugger

Application backgroundKINTEX 7 FPGA serial communication program & nbsp; KINTEX 7 FPGA serial communication program KINTEX 7 FPGA serial communication program KINTEX 7 FPGA serial communication program KINTEX 7 FPGA serial communication program KINTEX 7 FPGA serial communication programKey Technolog...

DE2_115_NIOS_HOST_MOUSE_VGA

Application backgroundDE2_115_NIOS_HOST_MOUSE_VGA this is achieved on the VGA DE2 display pictures, and through the use of mouse control. DE2_115_NIOS_HOST_MOUSE_VGA this is achieved on the VGA DE2 display pictures, and through the use of mouse control. DE2_115_NIOS_HOST_MOUSE_VGA this is achieved o...

Camera acquisition process (Verilog)

Program files include the register control, VGA CMOS camera viewer, IIC communication protocol program, suitable for general image sensor image capture application front end parts. Readers can be modified on the basis of this procedure, adding the contents to suit your application design....

Communication based on Verilog RS232

Application backgroundThis is achieved through the Verilog hardware description language, the XILINX KINTEX-7 series FPGA RS232 serial communication function. After I personally verified, can realize the function of communication.Key TechnologyThe function of this module is to verify the function of...


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