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The DMAC module in AMBA Bus based on SOC design

This design is based on the SOC system, using AMBA Bus DMA data transfer mode control module design of DMAC, a total of five modules, proven design timing constraints and other requirements...

Verilog use VGA display to push the box game

Application backgroundUsing FPGA to design the classic push box game, in the film on the chip ROM storage material and through the drive VGA display to achieve the game interface, players can control the game through the PS2 keyboard keys to control the case, when all the boxes arrive at the end of...

Collected some foreign Classical Verilog code

Collection of some foreign classic Verilog code, very classic, practical, suitable for some Verilog programming experience in the habit of learning. There are some notes of intermediate, easy to understand and analysis, very good use. Some examples of the classic, learning together, encourage each o...

Ethernet communication design Siga-S16FPGA Development Board

Siga-S16 based on Xilinx Spartan6 XC6SLX16 FPGA Development Board Ethernet communications. This test comes back to form, namely FPGA accepted process to PC (computer) sends UDP packets to resolve destination Mac address to determine if this is the packet to the FPGA. If that is the case, put the pac...

GPSR(Homemade GPS Receiver)

I was motivated to design this receiver after reading the work of Matjaž Vidmar, S53MV, who developed a GPS receiver from scratch, using mainly discrete components, over 20 years ago. His use of DSP following a hard-limiting IF and 1-bit ADC interested me. The receiver described here works on the s...

IFFT xlinx ISE development

IFFT procedures implemented in Verilog programming language, Xilinx is the device, the development environment is the ISE, pipelined, worth downloading experience, butterfly using base 2 decomposition can be used for digital filtering, signal processing and other fields, hoping that we can support ....

Ethernet for FPGA-PC communication

Description: This projectwas to design an interface that enabled the FPGA board to communicate withother devices via the on-board Ethernet connection.Responsibility: Design of 10Base T Ethernet MAC has been done in verilog and implemented the same onSpartan 3E FPGA Board. ...

FPGA Verilog digital clock

Application background This is an alarm clock implementing  functionality of a digital alarm clock on a FPGA BOard. It is written in the Verilog language and it is a digital clock program running quite successfully on the FPGA Development Board. When Compared to other languages veilo...


Application backgroundThis is a zybo based audio player code, you can achieve audio capture and playbackKey TechnologyAudio capture and playback, based on Verilog language embedded development...

FPGA control AD sampling

Application backgroundHigh speed AD sampling system based on FPGA control. Verilog as a programming language, after Modelsim validation...

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