usart.c ( File view )

  • By gregkam 2014-10-06
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			/*
 * usart.c --- STM32F4 USART driver.
 *
 * Copyright (C) 2012, Galois, Inc.
 * All Rights Reserved.
 *
 * This software is released under the "BSD3" license.  Read the file
 * "LICENSE" for more information.
 */

#include <stdint.h>

#include <stm32f4xx.h>

#include <FreeRTOS.h>
#include <queue.h>
#include <task.h>

#include "hwf4/interrupt.h"
#include "hwf4/rcc.h"
#include "hwf4/gpio.h"
#include "hwf4/usart.h"

#define BUFFER_SIZE     128

struct usart {

    USART_TypeDef *dev;

    // Clock config
    enum RCCDevice rcc_dev;

    // IRQ config
    enum IRQn irq;

    // GPIO config
    enum pin_af af;
    struct pin *tx_pin;
    struct pin *rx_pin;

    xQueueHandle rx_buf;
    xQueueHandle tx_buf;

};

#define INIT_USART   \
    .dev     = NULL, \
    .rcc_dev = 0,    \
    .irq     = 0,    \
    .af      = 0,    \
    .tx_pin  = NULL, \
    .rx_pin  = NULL, \
    .rx_buf  = NULL, \
    .tx_buf  = NULL

/**
 * @return true if the device is already enabled
 */
static inline bool __is_enabled(struct usart *usart) {

    return usart->dev->CR1 & USART_CR1_UE;

}

/**
 * Initialize a pin for the USART.
 */
static void __usart_init_pin(struct pin *pin, enum pin_af af) {

    pin_enable(pin);

    pin_set_ospeed(pin, PIN_SPEED_50MHZ);
    pin_set_otype (pin, PIN_TYPE_PUSHPULL);
    pin_set_pupd  (pin, PIN_PUPD_UP);

    pin_set_af(pin, af);
    pin_set_mode(pin, PIN_MODE_AF);

}

/**
 * Reset a value in CR1.
 *
 * @param usart USART device to use
 * @param val   Mask for the bits to reset
 */
static inline void __usart_reset_cr1(struct usart *usart, uint32_t val) {

    usart->dev->CR1 &= ~val;

}

/**
 * Update a value in CR1
 *
 * @param usart USART device to use
 * @param val   Maks to be added to CR1
 */
static inline void __usart_update_cr1(struct usart *usart, uint32_t val) {

    usart->dev->CR1 |= val;

}

/**
 * Reset a value in CR2.
 *
 * @param usart USART device to use
 * @param val   Mask for the bits to reset
 */
static inline void __usart_reset_cr2(struct usart *usart, uint32_t val) {

    usart->dev->CR2 &= ~val;

}

/**
 * Update a value in CR2
 *
 * @param usart USART device to use
 * @param val   Maks to be added to CR2
 */
static inline void __usart_update_cr2(struct usart *usart, uint32_t val) {

    usart->dev->CR2 |= val;

}

/**
 * Set the content of the data register
 */
static inline void __usart_set_dr(struct usart *usart, uint16_t val) {

    usart->dev->DR = val & 0x01ff;

}

/**
 * Get the content of the data register
 */
static inline uint16_t __usart_get_dr(struct usart *usart) {

    return (uint16_t)usart->dev->DR & 0x01ff;

}


enum usart_word_len {

    USART_WORD_LEN_8 = 0x0,
    USART_WORD_LEN_9 = 0x1

};

static inline void __usart_set_word_length(struct usart *usart,
        enum usart_word_len val) {


    __usart_reset_cr1(usart, USART_CR1_M);
    __usart_update_cr1(usart, (uint32_t)val << 12);


}


enum usart_stop_bits {

    USART_STOP_BITS_1_0 = 0x00, // 1   stop bit
    USART_STOP_BITS_0_5 = 0x01, // 0.5 stop bits
    USART_STOP_BITS_2_0 = 0x02, // 2.0 stop bits
    USART_STOP_BITS_1_5 = 0x03  // 1.5 stop bits

};

static inline void __usart_set_stop_bits(struct usart *usart,
        enum usart_stop_bits val) {


    __usart_reset_cr2(usart, USART_CR2_STOP);
    __usart_update_cr2(usart, (uint32_t)val << 12);

}


static inline void __usart_parity_enable(struct usart *usart) {

    __usart_update_cr1(usart, USART_CR1_PCE);

}

static inline void __usart_parity_disable(struct usart *usart) {

    __usart_reset_cr1(usart, USART_CR1_PCE);

}

enum usart_parity_mode {

    USART_PARITY_MODE_EVEN = 0x0,
    USART_PARITY_MODE_ODD  = 0x1

};

static inline void __usart_parity_mode(struct usart *usart,
        enum usart_parity_mode mode) {

    __usart_reset_cr1(usart, USART_CR1_PS);
    __usart_reset_cr1(usart, (uint32_t)mode << 9);

}

static inline void __usart_transmit_enable(struct usart *usart) {

    __usart_update_cr1(usart, USART_CR1_TE);

}

static inline void __usart_receive_enable(struct usart *usart) {

    __usart_update_cr1(usart, USART_CR1_RE);

}

/**
 * NOTE: this function was mostly adapted from ST's implementation in
 * stm32f4xx_usart.c
 */
static void __usart_set_baud_rate(struct usart *usart, uint32_t baud) {

    struct rcc_clocks_freq freq = {
0
};
    uint32_t apbclock, ipart, fpart, mask;

    rcc_get_clocks_freq(&freq);

    if(usart == usart1 || usart == usart6) {

        apbclock = freq.pclk2;
    
} else {

        apbclock = freq.pclk1;
    
}

    // integer part
    if(usart->dev->CR1 & USART_CR1_OVER8) {

        ipart = (25 * apbclock) / (2 * baud);
    
} else {

        ipart = (25 * apbclock) / (4 * baud);
    
}
    mask = (ipart / 100) << 4;

    // fractional part
    fpart = ipart - (100 * (mask >> 4));

    // implement the fractional part
    if(usart->dev->CR1 & USART_CR1_OVER8) {

        mask |= (((fpart * 8)  + 50) / 100) & 0x07;
    
} else {

        mask |= (((fpart * 16) + 50) / 100) & 0x0f;
    
}

    usart->dev->BRR = mask;

}

/**
 * Disable the transmit buffer empty interrupt.
 */
static inline void __usart_disable_txe(struct usart *usart) {

    __usart_reset_cr1(usart, USART_CR1_TXEIE);

}

/**
 * Enable the transmit buffer empty interrupt.
 */
static inline void __usart_enable_txe(struct usart *usart) {

    __usart_update_cr1(usart, USART_CR1_TXEIE);

}

/**
 * Enable the receive buffer not empty interrupt.
 */
static inline void __usart_enable_rxne(struct usart *usart) {

    __usart_update_cr1(usart, USART_CR1_RXNEIE);

}


/* External Interface *********************************************************/

bool usart_init(struct usart *usart, uint32_t baud) {


    if(__is_enabled(usart)) {

        return false;
    
}

    // enable the clock
    rcc_enable(usart->rcc_dev);

    // initialize pins
    __usart_init_pin(usart->tx_pin, usart->af);
    __usart_init_pin(usart->rx_pin, usart->af);

    // initialize the uart, this may need to be abstracted out into parameters
    // to usart_init at some point, to allow for different config options.
    __usart_set_baud_rate  (usart, baud);
    __usart_set_stop_bits  (usart, USART_STOP_BITS_1_0);
    __usart_set_word_length(usart, USART_WORD_LEN_8);
    __usart_parity_disable (usart);
    __usart_transmit_enable(usart);
    __usart_receive_enable (usart);

    // setup IRQ
    interrupt_set_priority(usart->irq, INTERRUPT_PRIORITY_FREERTOS_SAFE);
    interrupt_enable(usart->irq);

    usart->tx_buf = xQueueCreate(BUFFER_SIZE, sizeof(uint8_t));
    usart->rx_buf = xQueueCreate(BUFFER_SIZE, sizeof(uint8_t));

    return true;

}

void usart_enable(struct usart *usart) {

    __usart_enable_rxne(usart);
    __usart_update_cr1(usart, USART_CR1_UE);

}

int32_t usart_write_timeout(struct usart *usart, uint32_t timeout,
                            const uint8_t *buf, uint32_t len) {


    int32_t i = 0;

    for(; i<len; ++i, ++buf) {

        if(pdTRUE != xQueueSend(usart->tx_buf, buf, timeout)) {

            break;
        
}
    
}

    // enable the transmit interrupt
    __usart_enable_txe(usart);

    return i;

}

int32_t usart_write_blocking(struct usart *usart, const uint8_t *buf,
                             uint32_t len)
{

  __usart_disable_txe(usart);

  for (uint32_t i = 0; i < len; ++i) {

    while (!(usart->dev->SR & USART_SR_TXE))
      ;
    usart->dev->DR = buf[i];
  
}

  while (!(usart->dev->SR & USART_SR_TC))
    ;

  return len;

}

void usart_write_from_isr(struct
...
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irq.h6.68 kB2013-04-23|01:09
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usbd_cdc_core.h3.87 kB2013-04-23|01:09
usbd_cdc_if_template.h1.85 kB2013-04-23|01:09
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usbd_cdc_core.c24.57 kB2013-04-23|01:09
usbd_cdc_if_template.c6.07 kB2013-04-23|01:09
usbd_cdc_vcp.c6.71 kB2013-04-23|01:09
usbd_core.c11.39 kB2013-04-23|01:09
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