stm32f4xx_wwdg.c ( File view )

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			/**
  ******************************************************************************
  * @file    stm32f4xx_wwdg.c
  * @author  MCD Application Team
  * @version V1.0.0
  * @date    30-September-2011
  * @brief   This file provides firmware functions to manage the following 
  *          functionalities of the Window watchdog (WWDG) peripheral:           
  *           - Prescaler, Refresh window and Counter configuration
  *           - WWDG activation
  *           - Interrupts and flags management
  *             
  *  @verbatim
  *    
  *          ===================================================================
  *                                     WWDG features
  *          ===================================================================
  *                                        
  *          Once enabled the WWDG generates a system reset on expiry of a programmed
  *          time period, unless the program refreshes the counter (downcounter) 
  *          before to reach 0x3F value (i.e. a reset is generated when the counter
  *          value rolls over from 0x40 to 0x3F). 
  *          An MCU reset is also generated if the counter value is refreshed
  *          before the counter has reached the refresh window value. This 
  *          implies that the counter must be refreshed in a limited window.
  *            
  *          Once enabled the WWDG cannot be disabled except by a system reset.                          
  *          
  *          WWDGRST flag in RCC_CSR register can be used to inform when a WWDG
  *          reset occurs.
  *            
  *          The WWDG counter input clock is derived from the APB clock divided 
  *          by a programmable prescaler.
  *              
  *          WWDG counter clock = PCLK1 / Prescaler
  *          WWDG timeout = (WWDG counter clock) * (counter value)
  *                      
  *          Min-max timeout value @42 MHz(PCLK1): ~97.5 us / ~49.9 ms
  *                            
  *          ===================================================================
  *                                 How to use this driver
  *          =================================================================== 
  *          1. Enable WWDG clock using RCC_APB1PeriphClockCmd(RCC_APB1Periph_WWDG, ENABLE) function
  *            
  *          2. Configure the WWDG prescaler using WWDG_SetPrescaler() function
  *                           
  *          3. Configure the WWDG refresh window using WWDG_SetWindowValue() function
  *            
  *          4. Set the WWDG counter value and start it using WWDG_Enable() function.
  *             When the WWDG is enabled the counter value should be configured to 
  *             a value greater than 0x40 to prevent generating an immediate reset.     
  *            
  *          5. Optionally you can enable the Early wakeup interrupt which is 
  *             generated when the counter reach 0x40.
  *             Once enabled this interrupt cannot be disabled except by a system reset.
  *                 
  *          6. Then the application program must refresh the WWDG counter at regular
  *             intervals during normal operation to prevent an MCU reset, using
  *             WWDG_SetCounter() function. This operation must occur only when
  *             the counter value is lower than the refresh window value, 
  *             programmed using WWDG_SetWindowValue().         
  *
  *  @endverbatim  
  *                             
  ******************************************************************************
  * @attention
  *
  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
  *
  * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
  ******************************************************************************
  */

/* Includes ------------------------------------------------------------------*/
#include "stm32f4xx_wwdg.h"
#include "stm32f4xx_rcc.h"

/** @addtogroup STM32F4xx_StdPeriph_Driver
  * @{

  */

/** @defgroup WWDG 
  * @brief WWDG driver modules
  * @{

  */

/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/

/* ----------- WWDG registers bit address in the alias region ----------- */
#define WWDG_OFFSET       (WWDG_BASE - PERIPH_BASE)
/* Alias word address of EWI bit */
#define CFR_OFFSET        (WWDG_OFFSET + 0x04)
#define EWI_BitNumber     0x09
#define CFR_EWI_BB        (PERIPH_BB_BASE + (CFR_OFFSET * 32) + (EWI_BitNumber * 4))

/* --------------------- WWDG registers bit mask ------------------------ */
/* CFR register bit mask */
#define CFR_WDGTB_MASK    ((uint32_t)0xFFFFFE7F)
#define CFR_W_MASK        ((uint32_t)0xFFFFFF80)
#define BIT_MASK          ((uint8_t)0x7F)

/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/

/** @defgroup WWDG_Private_Functions
  * @{

  */

/** @defgroup WWDG_Group1 Prescaler, Refresh window and Counter configuration functions
 *  @brief   Prescaler, Refresh window and Counter configuration functions 
 *
@verbatim   
 ===============================================================================
          Prescaler, Refresh window and Counter configuration functions
 ===============================================================================  

@endverbatim
  * @{

  */

/**
  * @brief  Deinitializes the WWDG peripheral registers to their default reset values.
  * @param  None
  * @retval None
  */
void WWDG_DeInit(void)
{

  RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, ENABLE);
  RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, DISABLE);

}

/**
  * @brief  Sets the WWDG Prescaler.
  * @param  WWDG_Prescaler: specifies the WWDG Prescaler.
  *   This parameter can be one of the following values:
  *     @arg WWDG_Prescaler_1: WWDG counter clock = (PCLK1/4096)/1
  *     @arg WWDG_Prescaler_2: WWDG counter clock = (PCLK1/4096)/2
  *     @arg WWDG_Prescaler_4: WWDG counter clock = (PCLK1/4096)/4
  *     @arg WWDG_Prescaler_8: WWDG counter clock = (PCLK1/4096)/8
  * @retval None
  */
void WWDG_SetPrescaler(uint32_t WWDG_Prescaler)
{

  uint32_t tmpreg = 0;
  /* Check the parameters */
  assert_param(IS_WWDG_PRESCALER(WWDG_Prescaler));
  /* Clear WDGTB[1:0] bits */
  tmpre
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stm32f4xx_dma.o461.39 kB2014-09-30|11:21
stm32f4xx_exti.crf416.59 kB2014-09-30|11:21
stm32f4xx_exti.d2.04 kB2014-09-30|11:21
stm32f4xx_exti.o444.07 kB2014-09-30|11:21
stm32f4xx_flash.crf420.54 kB2014-09-30|11:21
stm32f4xx_flash.d2.08 kB2014-09-30|11:21
stm32f4xx_flash.o475.34 kB2014-09-30|11:21
stm32f4xx_gpio.crf417.89 kB2014-09-30|11:21
stm32f4xx_gpio.d2.04 kB2014-09-30|11:21
stm32f4xx_gpio.o453.07 kB2014-09-30|11:21
stm32f4xx_it.crf415.49 kB2014-09-30|11:21
stm32f4xx_it.d1.97 kB2014-09-30|11:21
stm32f4xx_it.o444.81 kB2014-09-30|11:21
stm32f4xx_pwr.crf417.44 kB2014-09-30|11:21
stm32f4xx_pwr.d2.01 kB2014-09-30|11:21
stm32f4xx_pwr.o449.88 kB2014-09-30|11:21
stm32f4xx_rcc.crf424.55 kB2014-09-30|11:21
stm32f4xx_rcc.d2.01 kB2014-09-30|11:21
stm32f4xx_rcc.o495.22 kB2014-09-30|11:21
stm32f4xx_rng.crf415.92 kB2014-09-30|11:21
stm32f4xx_rng.d2.01 kB2014-09-30|11:21
stm32f4xx_rng.o443.76 kB2014-09-30|11:21
stm32f4xx_rtc.crf433.11 kB2014-09-30|11:21
stm32f4xx_rtc.d2.01 kB2014-09-30|11:21
stm32f4xx_rtc.o516.53 kB2014-09-30|11:21
stm32f4xx_sdio.crf419.94 kB2014-09-30|11:21
stm32f4xx_sdio.d2.04 kB2014-09-30|11:21
stm32f4xx_sdio.o474.00 kB2014-09-30|11:21
stm32f4xx_spi.crf420.43 kB2014-09-30|11:21
stm32f4xx_spi.d2.01 kB2014-09-30|11:21
stm32f4xx_spi.o468.64 kB2014-09-30|11:21
stm32f4xx_syscfg.crf416.09 kB2014-09-30|11:21
stm32f4xx_syscfg.d2.12 kB2014-09-30|11:21
stm32f4xx_syscfg.o441.90 kB2014-09-30|11:21
stm32f4xx_tim.crf435.53 kB2014-09-30|11:21
stm32f4xx_tim.d2.01 kB2014-09-30|11:21
stm32f4xx_tim.o563.30 kB2014-09-30|11:21
stm32f4xx_usart.crf420.95 kB2014-09-30|11:21
stm32f4xx_usart.d2.08 kB2014-09-30|11:21
stm32f4xx_usart.o474.46 kB2014-09-30|11:21
stm32f4xx_wwdg.crf416.16 kB2014-09-30|11:21
stm32f4xx_wwdg.d2.04 kB2014-09-30|11:21
stm32f4xx_wwdg.o443.88 kB2014-09-30|11:21
system_stm32f4xx.crf417.16 kB2014-09-30|11:21
system_stm32f4xx.d2.06 kB2014-09-30|11:21
system_stm32f4xx.o438.50 kB2014-09-30|11:21
uart1.crf455.77 kB2014-09-30|11:22
uart1.d2.97 kB2014-09-30|11:22
uart1.o490.19 kB2014-09-30|11:22
ultrasonic.crf420.98 kB2014-09-30|11:22
ultrasonic.d2.09 kB2014-09-30|11:22
ultrasonic.o451.47 kB2014-09-30|11:22
usart1dmatx.crf418.27 kB2014-09-30|11:22
usart1dmatx.d2.02 kB2014-09-30|11:22
usart1dmatx.o444.86 kB2014-09-30|11:22
Protel76.01 kB2013-11-26|21:29
01.97 kB
startup_stm32f4xx.s28.82 kB2011-10-28|10:31
system_stm32f4xx.c21.36 kB2013-06-17|19:09
system_stm32f4xx.h2.05 kB2011-10-28|10:31
startup_stm32f4xx.lst73.83 kB2014-09-30|11:21
01.97 kB
main.c9.82 kB2014-02-27|11:56
main.h1.86 kB2012-11-15|11:46
Read_Me.txt6.96 kB2013-12-16|21:46
stm32f4xx_conf.h3.71 kB2013-03-05|14:42
stm32f4xx_it.c4.34 kB2013-03-05|12:05
stm32f4xx_it.h2.00 kB2013-03-05|12:06
...
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stm32f4xx_wwdg.c (12.86 MB)

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