Home » Source Code » MPU6050 (hardware IIC) » system_stm32f10x.c

system_stm32f10x.c ( File view )

  • By 昱晨 2015-04-27
  • View(s):8
  • Download(s):2
  • Point(s): 0
			/**
  ******************************************************************************
  * @file    system_stm32f10x.c
  * @author  MCD Application Team
  * @version V3.5.0
  * @date    11-March-2011
  * @brief   CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
  * 
  * 1.  This file provides two functions and one global variable to be called from 
  *     user application:
  *      - SystemInit(): Setups the system clock (System clock source, PLL Multiplier
  *                      factors, AHB/APBx prescalers and Flash settings). 
  *                      This function is called at startup just after reset and 
  *                      before branch to main program. This call is made inside
  *                      the "startup_stm32f10x_xx.s" file.
  *
  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
  *                                  by the user application to setup the SysTick 
  *                                  timer or configure other parameters.
  *                                     
  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
  *                                 be called whenever the core clock is changed
  *                                 during program execution.
  *
  * 2. After each device reset the HSI (8 MHz) is used as system clock source.
  *    Then SystemInit() function is called, in "startup_stm32f10x_xx.s" file, to
  *    configure the system clock before to branch to main program.
  *
  * 3. If the system clock source selected by user fails to startup, the SystemInit()
  *    function will do nothing and HSI still used as system clock source. User can 
  *    add some code to deal with this issue inside the SetSysClock() function.
  *
  * 4. The default value of HSE crystal is set to 8 MHz (or 25 MHz, depedning on
  *    the product used), refer to "HSE_VALUE" define in "stm32f10x.h" file. 
  *    When HSE is used as system clock source, directly or through PLL, and you
  *    are using different crystal you have to adapt the HSE value to your own
  *    configuration.
  *        
  ******************************************************************************
  * @attention
  *
  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
  *
  * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
  ******************************************************************************
  */

/** @addtogroup CMSIS
  * @{

  */

/** @addtogroup stm32f10x_system
  * @{

  */  
  
/** @addtogroup STM32F10x_System_Private_Includes
  * @{

  */

#include "stm32f10x.h"

/**
  * @
}
  */

/** @addtogroup STM32F10x_System_Private_TypesDefinitions
  * @{

  */

/**
  * @
}
  */

/** @addtogroup STM32F10x_System_Private_Defines
  * @{

  */

/*!< Uncomment the line corresponding to the desired System clock (SYSCLK)
   frequency (after reset the HSI is used as SYSCLK source)
   
   IMPORTANT NOTE:
   ============== 
   1. After each device reset the HSI is used as System clock source.

   2. Please make sure that the selected System clock doesn't exceed your device's
      maximum frequency.
      
   3. If none of the define below is enabled, the HSI is used as System clock
    source.

   4. The System clock configuration functions provided within this file assume that:
        - For Low, Medium and High density Value line devices an external 8MHz 
          crystal is used to drive the System clock.
        - For Low, Medium and High density devices an external 8MHz crystal is
          used to drive the System clock.
        - For Connectivity line devices an external 25MHz crystal is used to drive
          the System clock.
     If you are using different crystal you have to adapt those functions accordingly.
    */
    
#if defined (STM32F10X_LD_VL) || (defined STM32F10X_MD_VL) || (defined STM32F10X_HD_VL)
/* #define SYSCLK_FREQ_HSE    HSE_VALUE */
 #define SYSCLK_FREQ_24MHz  24000000
#else
/* #define SYSCLK_FREQ_HSE    HSE_VALUE */
/* #define SYSCLK_FREQ_24MHz  24000000 */ 
/* #define SYSCLK_FREQ_36MHz  36000000 */
/* #define SYSCLK_FREQ_48MHz  48000000 */
/* #define SYSCLK_FREQ_56MHz  56000000 */
#define SYSCLK_FREQ_72MHz  72000000
#endif

/*!< Uncomment the following line if you need to use external SRAM mounted
     on STM3210E-EVAL board (STM32 High density and XL-density devices) or on 
     STM32100E-EVAL board (STM32 High-density value line devices) as data memory */ 
#if defined (STM32F10X_HD) || (defined STM32F10X_XL) || (defined STM32F10X_HD_VL)
/* #define DATA_IN_ExtSRAM */
#endif

/*!< Uncomment the following line if you need to relocate your vector Table in
     Internal SRAM. */ 
/* #define VECT_TAB_SRAM */
#define VECT_TAB_OFFSET  0x0 /*!< Vector Table base offset field. 
                                  This value must be a multiple of 0x200. */


/**
  * @
}
  */

/** @addtogroup STM32F10x_System_Private_Macros
  * @{

  */

/**
  * @
}
  */

/** @addtogroup STM32F10x_System_Private_Variables
  * @{

  */

/*******************************************************************************
*  Clock Definitions
*******************************************************************************/
#ifdef SYSCLK_FREQ_HSE
  uint32_t SystemCoreClock         = SYSCLK_FREQ_HSE;        /*!< System Clock Frequency (Core Clock) */
#elif defined SYSCLK_FREQ_24MHz
  uint32_t SystemCoreClock         = SYSCLK_FREQ_24MHz;        /*!< System Clock Frequency (Core Clock) */
#elif defined SYSCLK_FREQ_36MHz
  uint32_t SystemCoreClock         = SYSCLK_FREQ_36MHz;        /*!< System Clock Frequency (Core Clock) */
#elif defined SYSCLK_FREQ_48MHz
  uint32_t SystemCoreClock         = SYSCLK_FREQ_48MHz;        /*!< System Clock Frequency (Core Clock) */
#elif defined SYSCLK_FREQ_56MHz
  uint32_t SystemCoreClock         = SYSCLK_FREQ_56MHz;        /*!< System Clock Frequency (Core Clock) */
#elif defined SYSCLK_FREQ_72MHz
  uint32_t SystemCoreClock         = SYSCLK_FREQ_72MHz;        /*!< System Clock Frequency (Core Clock) */
#else /*!< HSI Selected as System Clock source */
  uint32_t SystemCoreClock         = HSI_VALUE;        /*!< System Clock Frequency (Core Clock) */
#endif

__I uint8_t AHBPrescTable[16] = {
0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9
};
/**
  * @
}
  */

/** @addtogroup STM32F10x_System_Private_FunctionPrototypes
  * @{

  */

static void SetSysClock(void);

#ifdef SYSCLK_FREQ_HSE
  static void SetSysClockToHSE(void);
#elif defined SYSCLK_FREQ_24MHz
  static void SetSysClockTo24(void);
#elif defined SYSCLK_FREQ_36MHz
  static void SetSysClockTo36(void);
#elif defined SYSCLK_FREQ_48MHz
  static void SetSysClockTo48(void);
#elif defined SYSCLK_FREQ_56MHz
  static void SetSysClockTo56(void);  
#elif defined SYSCLK_FREQ_72MHz
  static void SetSysClockTo72(void);
#endif

#ifdef DATA_IN_ExtSRAM
  static void SystemInit_ExtMemCtl(void); 
#endif /* DATA_IN_ExtSRAM */

/**
  * @
}
  */

/** @addtogroup STM32F10x_System_Private_Functions
  * @{

  */

/**
  * @brief  Setup the microcontroller system
  *         Initialize the Embedded Flash Interface, the PLL and update the 
  *         SystemCoreClock variable.
  * @note   This function should be used only after reset.
  * @param  None
  * @retval None
  */
void SystemInit (void)
{

  /* Reset the RCC clock configuration to the default reset state(for debug purpose) */
  /* Set HSION bit */
  RCC->CR |= (uint32_t)0x00000001;

  /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
#ifndef STM32F10X_CL
  RCC->CFGR &= (uint32_t)0xF8FF0000;
#else
  RCC->CFGR &= (uint32_t)0xF0FF0000;
#endif /* STM32F10X_CL */   
  
  /* Reset HSEON, CSSON and PLLON bits */
  RCC->CR &= (uint32_t)0xFEF6FFFF;

  /* Reset HSEBYP bit */
  RCC->CR &= (uint32_t)0xFFFBFFFF;

  /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
  RCC->CFGR &= (uint32_t)0xFF80FFFF;

#ifdef STM32F10X_CL
  /* Reset PLL2ON and PLL3ON bits */
  RCC->CR &= (uint32_t)0xEBFFFFFF;

  /* Disable all interrupts and clear pending bits  */
  RCC->CIR = 0x00FF0000;

  /* Reset CFGR2 register */
  RCC->CFGR2 = 0x00000000;
#elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL)
  /* Disable all interrupts and clear pending bits  */
  RCC->CIR = 0x009F0000;

  /* Reset CFGR2 register */
  RCC->CFGR2 = 0x00000000;      
#else
  /* Disable all interrupts and clear pending bits  */
  RCC->CIR = 0x009F0000;
#endif /* STM32F10X_CL */
    
#if defined (STM32F10X_HD) || (defined STM32F10X_XL) || (defined STM32F10X_HD_VL)
  #ifdef DATA_IN_ExtSRAM
    SystemInit_ExtMemCtl(); 
  #endif /* DATA_IN_ExtSRAM */
#endif 

  /* Configure the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers */
  /* Configure the Flash Latency cycles and enable prefetch buffer */
  SetSysClock();

#ifdef VECT_TAB_SRAM
  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
#endif 

}

/**
  * @brief  Update SystemCoreClock variable according to Clock Register Values.
  *         The SystemCoreClock variable contains the core clock (HCLK), it can
  *         be used by the user application to setup the SysTick timer or configure
  *         other parameters.
  *           
  * @note   Each time the core clock (HCLK) changes, this function must be called
  *         to update SystemCoreClock variable value. Otherwise, any configuration
  *         based on this variable will be incorrect.         
  *     
  * @note   - The system fre
...
...
(Not finished, please download and read the complete file)
			
...
Expand> <Close

Want complete source code? Download it here

Point(s): 0

Download
0 lines left, continue to read
Sponsored links

File list

Tips: You can preview the content of files by clicking file names^_^
Name Size Date
01.97 kB
01.97 kB
core_cm3.c16.87 kB2010-06-07 10:25
core_cm3.h83.71 kB2011-02-09 14:59
startup_stm32f10x_hd.s15.14 kB2011-03-10 10:52
stm32f10x.h619.08 kB2011-03-10 10:51
system_stm32f10x.c35.70 kB2011-03-10 10:51
system_stm32f10x.h2.04 kB2011-03-10 10:51
01.97 kB
01.97 kB
misc.h8.77 kB2011-03-10 10:47
stm32f10x_adc.h21.18 kB2011-03-10 10:47
stm32f10x_bkp.h7.38 kB2011-03-10 10:47
stm32f10x_can.h26.91 kB2011-03-10 10:47
stm32f10x_cec.h6.42 kB2011-03-10 10:47
stm32f10x_crc.h2.11 kB2011-03-10 10:47
stm32f10x_dac.h14.88 kB2011-03-10 10:47
stm32f10x_dbgmcu.h3.73 kB2011-03-10 10:47
stm32f10x_dma.h20.27 kB2011-03-10 10:47
stm32f10x_exti.h6.66 kB2011-03-10 10:47
stm32f10x_flash.h24.85 kB2011-03-10 10:47
stm32f10x_fsmc.h26.38 kB2011-03-10 10:47
stm32f10x_gpio.h19.70 kB2011-03-10 10:47
stm32f10x_i2c.h29.33 kB2011-03-10 10:47
stm32f10x_iwdg.h3.74 kB2011-03-10 10:47
stm32f10x_pwr.h4.28 kB2011-03-10 10:47
stm32f10x_rcc.h29.74 kB2011-03-10 10:47
stm32f10x_rtc.h3.77 kB2011-03-10 10:47
stm32f10x_sdio.h21.35 kB2011-03-10 10:47
stm32f10x_spi.h17.31 kB2011-03-10 10:47
stm32f10x_tim.h51.20 kB2011-03-10 10:47
stm32f10x_usart.h16.16 kB2011-03-10 10:47
stm32f10x_wwdg.h2.90 kB2011-03-10 10:47
01.97 kB
misc.c6.88 kB2011-03-10 10:47
stm32f10x_adc.c46.09 kB2011-03-10 10:47
stm32f10x_bkp.c8.26 kB2011-03-10 10:47
stm32f10x_can.c44.05 kB2011-03-10 10:47
stm32f10x_cec.c11.38 kB2011-03-10 10:47
stm32f10x_crc.c3.27 kB2011-03-10 10:47
stm32f10x_dac.c18.64 kB2011-03-10 10:47
stm32f10x_dbgmcu.c5.03 kB2011-03-10 10:47
stm32f10x_dma.c28.91 kB2011-03-10 10:47
stm32f10x_exti.c6.80 kB2011-03-10 10:47
stm32f10x_flash.c61.08 kB2011-03-10 10:47
stm32f10x_fsmc.c34.65 kB2011-03-10 10:47
stm32f10x_gpio.c22.68 kB2011-03-11 17:43
stm32f10x_i2c.c44.71 kB2011-03-10 10:47
stm32f10x_iwdg.c4.80 kB2011-03-10 10:47
stm32f10x_pwr.c8.55 kB2011-03-10 10:47
stm32f10x_rcc.c50.07 kB2011-03-10 10:47
stm32f10x_rtc.c8.40 kB2011-03-10 10:47
stm32f10x_sdio.c28.25 kB2011-03-10 10:47
stm32f10x_spi.c29.52 kB2011-03-10 10:47
stm32f10x_tim.c106.60 kB2011-03-10 10:47
stm32f10x_usart.c37.41 kB2011-03-10 10:47
stm32f10x_wwdg.c5.60 kB2011-03-10 10:47
01.97 kB
01.97 kB
systick.hex18.40 kB2013-08-15 19:23
01.97 kB
I2C_MPU6050.c4.69 kB2013-08-15 19:23
I2C_MPU6050.h1.13 kB2013-08-15 19:10
I2C_MPU6050.uvgui.Orange131.20 kB2013-08-15 19:25
I2C_MPU6050.uvgui.flyleaf66.57 kB2012-06-25 20:54
I2C_MPU6050.uvopt10.45 kB2013-08-15 19:25
I2C_MPU6050.uvproj16.56 kB2013-08-15 19:00
JLink497.00 B2012-06-25 20:12
JLinkSettings.ini375.00 B2012-06-24 14:45
delay.c177.00 B2011-08-10 16:44
delay.h98.00 B2011-08-08 21:03
main.c1.48 kB2013-08-15 19:11
stm32f10x_conf.h3.22 kB2012-06-24 22:12
stm32f10x_it.c4.30 kB2011-04-04 19:03
stm32f10x_it.h2.04 kB2011-04-04 19:03
usart1.c5.33 kB2013-08-15 14:40
usart1.h234.00 B2011-08-05 21:11
keilkilll.bat399.00 B2011-04-23 10:24
...
Sponsored links

system_stm32f10x.c (294.78 kB)

Need 0 point
Your Point(s)
Download Download

Download failed? Click here to download one by one.

Tip: this source code project contains 2 packages, please click the allow button on the browser pop-up dialog,after you click the download button.

▪ Click to download this source code directly

LOGIN

Don't have an account? Register now
Need any help?
Mail to: support@codeforge.com

切换到中文版?

CodeForge Chinese Version
CodeForge English Version

Where are you going?

^_^"Oops ...

Sorry!This guy is mysterious, its blog hasn't been opened, try another, please!
OK

Warm tip!

CodeForge to FavoriteFavorite by Ctrl+D