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Source-Action part of the station

"Letters" is intended for the convenience of Member business correspondence service, similar to the mailbox, mainly from the Inbox, Outbox, drafts, and trash consists of four parts, but this feature is only open to registered members of the site. "Faith" is different from e-mail, e-mail sent t...
  Web Framework        Java     

Another implementation way of Android actionbar

Android side effects in achieving, without relying on the v7 framework conditions, achieved a similar NET client side effects, mainly implementation of code is menudrawer....
  Android        Java     

ActionScript 3 0

O'Reilly - ActionScript 3 0 Cookbook...
  document        ActionScript     

addCustomer

The application should let a user maintain a list of customers. After selecting a customer the user should be able to specify in what states the customer does business in. By clicking the "Save all changes"-button all the changes made by the user should be stored in a MySQL database. List of clie...
  Other        PHP     

full adderer

A multiplier is one of the key hardware blocks in most digital and high performance systems such as FIR filters, digital signal processors and microprocessors etc. With advances in technology, many researchers have tried and are trying to design multipliers which offer either of the following...
  Android      VHDL     

Guestbook code

A JSP application achieve guest book Guest book admin management JavaBean,Taglib, technology For JSP beginner to learn to use...
  Java Development        Java     

Proyect short of vaddin framework

The component base classes and interfaces provide a large number of features. Let us look at some of the most commonly needed features. Features not documented here can be found from the Java API Reference. The interface defines a number of properties, which you can retrieve or manipulate with...
  Algorithm        Java     

Full adder

module full_adder(     output reg sum,     output c_out,   // carry out     input a,     input b,     input c_in);    // carry in      always @(*)        begin       &n...
  add      Verilog     

The addition of less than 100

Java source code that is less than 100 addition, application is a small Java applet, to randomly select a number of questions, and random topics, able to calculate the correct rates, error rates, and so on,...
  Java Development        Java     

Full adder in verilog

A simple verilog code for full_adder. It is tested in both simulator and xilinx spartan3E fpga board. ...
  verilog      Verilog     

carry look ahead adder

This is carry look ahead adder which is very useful in order to add 4 bit thing . A carry-lookahead adder (CLA) is a type of adder used in digital logic. A carry-lookahead adder improves speed by reducing the amount of time required to determine carry bits. It can be contrasted with the simpler,...
  vhdl      VHDL     

address list using Java

Using Java to realize a contact list, suitable for beginners. With simple queries, insert, delete and other functions! addressBook1.0: a command-line based, data is stored in a properties file in the config directory. admin.properties: stored user names and passwords, telephone.properties: store add...
  Java Development        Java     

Implementation and calculation adder

The addition of a source code is based on MFC and c++ calculator. Welcome to download and try. Thank you all for your support!...
  GUI        C++     

Cmos Full adders Using Adiabatic Logic

Adiabatic circuits are low power circuits which use "reversible logic" to conserve energy. Unlike traditional CMOS circuits, which dissipate energy during switching, adiabatic circuits attempt to conserve charge by following two key rules: Never turn on a&nbs...
  vhdl      VHDL     

Advanced encryption techinques

Advanced encryption techniques is used  for security purpose in which the data is encrypted and then transmitted while decryted the data is we should decode the aes algorthm ...
  Matlab        Matlab     

SIFT feature extraction algorithm

Rob Hess wrote in c open source SIFT – OpenSIFT And not much different from the original sample run performance. Because of the SIFT algorithm is more complex, limited in my ability and timing, algorithm implementation details this section will mainly Lowe papers and OpenSIFT source, I d...
  Image Processing        C++     

half-adder

it contains half-adder vhdl code and simulate form also, there is test bench coding for half-adder, which means writers can gave a clock by himself. like a <= '0', '1' after 5ns, '0' after 10ns, '1' after 15ns, '0' after 20ns, '1'after 25ns, '0' after 30ns, '1' after 35ns;...
  vhdl      VHDL     

half-adder

it contain VHDL half -adder with test-bench test-bench means 'project maker can announce what time shall he give a term for example a <= '0', '1' after 5ns, '0' after 10ns, '1' after 15ns, '0' after 20ns, '1' after 25ns, '0' after 30ns, '1' 35ns; b <= '0', '1' after 10n...
  vhdl      VHDL     

Image's outline extraction

Image contour extraction, Images can be extracted (cartoon picture better) profile (the equivalent of sketches), this is a very good program, the program is simple and easy to implement, let it be adopted...
  Matlab        Matlab     

Full-adder and its simulation

This code is a Verilog HDL code, for a full-adder, which has its source code, and simulation results, wave and so on. Quartus II can be used to open, or downloaded to the FPGA Development Board....
  Image Processing      Verilog     

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