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16 bit risc processor for computer hardware

16 bit risc processor for computer hardware ...
  Algorithm      VHDL     

4-bit counters verilog code

One of the basics of verilog source code, binary counters for a 4. Both counts can be achieved to realize the frequency of the clock signal, so that is one very practical introduction to verilog code. On the basis of this code, you can make a variety of changes, to achieve different functionality....
  verilog      VHDL     

verilog code for the GPS baseband processing

GPS software receiver baseband processing verilog programs, by spread spectrum demodulation, intermediate frequency data synchronization process converts the raw navigation data...
  verilog      Verilog     

IEEE 754 32 bit - MATLAB

The IEEE Standard for Floating-Point Arithmetic (IEEE 754) is a technical standard for floating-point computation established in 1985 by the Institute of Electrical and Electronics Engineers(IEEE). Many hardware floating point units use the IEEE 754 stan...
  Matlab        Matlab     

risc Microcontroller

riscMCU is based on the features and instruction set of Atmel AVR AT90S1200 risc Microcontroller. The aim of the project is to design the complete Atmel AVR AT90S1200. The microcontroller must be able to fit into the targeted FPGA device, which is Altera EPF10K20, provided in Altera UP1 Edu...
  verilog      Verilog     

Simple Full Adder verilog code

This is a simple 1 bit full adder verilog code `timescale 1ns / 1ps module 1bitFullAdder ( input a, input b, input cin, output s, output cout ); assign s = a ^ b ^ cin; assign cout = (a & b) | (a & cin) | (b & cin); endmodule //Test Bench...
  Verilog      Verilog     

SOPC technology using verilog create Hello program

SOPC technology FPGA verilog hardware description language, writing in niosII  program    using Altera chip...
  verilog      VHDL     

classics_verilog_codes_for_commom_projects

it contains a mass  of classics verilog codes for common projects,such as FIFO, add8, RS coding, multiplexing,and so on. these verilog codes are all very basic but extensive, which must be a great help for beginners who learn verilog. it will help beginner to control verilog languar...
  verilog      Verilog     

verilog simulation filters

verilog procedural simulation filters 16-order using the Adder and multiplier 40KHZ 16-bit into and out...
  verilog      Verilog     

"Original" display __ __verilog_ _FPGA control _1602 debugging notes

FPGA control principle and LCD1602 debugging notes source code This information came from Baidu bases (http://wenku.Baidu.com/) You now see the document is used to hold rice Baidu base generated by the Download Manager This document's original address from Thank you for your support Hold rice...
  verilog      Verilog     

DDS_Dual_ports verilog implementation

DDS_Dual_ports verilog implementation, you need to download experiment, according to their own needs to be modified in order to achieve the purpose of its...
  verilog      Verilog     

verilog serial port serial port receive module receiver module

verilog serial port serial port receive module receiver module, contains the BPS modules, level detection module and the control module...
  verilog      Verilog     

Four lights switch of marquee (marquee program in verilog_hdl languages)

This is a learning verilog HDL good information, suitable for beginners, explained in detail, from the light into the deep, learning the language, it is a hardware description language for good stuff, good material!...
  verilog      Verilog     

8,051 nuclear verilog source code

8,051 core RTL source code, with integrated testbench and scripts 8,051 core RTL source code, with integrated testbench and scripts 8,051 core RTL source code, with integrated testbench and scripts 8,051 core RTL source code, with integrated testbench and scripts 8,051 core R...
  verilog        ASM     

Using FPGA verilog HDL simulation class I2C communication

Using FPGA verilog HDL simulation class I2C communication...
  verilog      Verilog     

radix 2 fft 32 bit using verilog

it provides source code for 32 point fft using verilog along with multiplier which describes butterfly unit using 32 bit multiplier along with carry look aheaada adder 32 bit using behavioural description.....
  verilog      Verilog     

DDR2 controller, verilog source code

Using verilog prepared of DDR2 controller, achieved has DDR2 of reads and writes function, in Xilinx vietex5 Shang to achieved, achieved has Imaging algorithm in the of data turn home,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,...
  verilog      Verilog     

Introduction to verilog

This article introduces the basics of verilog HDL language, to enable the beginner to quickly grasp the HDL Design methods, preliminary reports and to master the basics of verilog HDL language, to be able to read simple design code and Enough to make some simple verilog HDL design modeling...
  verilog      Verilog     

vedic multiplier 32 bit

design of high speed 32 bit vedic multiplier using vedic mahematics. this has a very less delay than other type of multipliers....
  verilog      Verilog     

Floating-point multiply verilog FPGA

Digital multiplier, as an integral part of modern computers, their design work and more and more people's attention. This paper, hardware description languages verilog HDL design a floating-point multiplier based on complement one multiplication and design functions and better flexibility. Th...
  verilog      Verilog     

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