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2014-11-26 22:37    By:courageheart      View:228      Download:5

Annex to the verilog code of Samsung's K9 Flash controllers, already compile OK on FPGA Development Board and the validation passes, ModelSim and verification environment for quartusii the joint platform. Datasheet on the K9 series Flash, users can go to the site and look for yourself. The Flash siz...

verilog Verilog

16 bit risc processor for computer hardware

2014-11-25 08:17    By:ani      View:17      Download:0

16 bit risc processor for computer hardware ...

Algorithm VHDL

1K SRAM seperate read and write ports, verilog code for ASIC design

2014-11-26 08:18    By:gucci1029      View:320      Download:2

1K SRAM, arranged as words of 32 bit, seperate read and write ports, verilog code for ASIC designusing even parity on count of 1's.also comes with testbench...

verilog VHDL

AXI slave verilog code

2014-11-26 22:16    By:redleaf      View:109      Download:4

Wrote AXI slaver verilog code, hope to give you some inspiration...

verilog Verilog

VGA color display the verilog code for Xilinx FPGA

51 seconds ago    By:xinliu      View:258      Download:1

verilog implementation of FPGA VGA sesser stripes display code, test absolutely right, can successfully implement functionality....

verilog Verilog

4-bit counters verilog code

58 minutes ago    By:caochishu      View:80      Download:0

One of the basics of verilog source code, binary counters for a 4. Both counts can be achieved to realize the frequency of the clock signal, so that is one very practical introduction to verilog code. On the basis of this code, you can make a variety of changes, to achieve different functionality....

verilog VHDL

Parallel CRC verilog code generator

2014-11-26 22:26    By:KPROCKS      View:82      Download:1

A parllel CRC verilog generator has been written in C++ to generate a parallel CRC verilog code for a given user defined data width and CRC polynomial. This is from outputlogic.com . This a direct implementation algorithm used in the website....

verilog Verilog

Ledbanner in verilog code using FPGA SPARTAN-3E

2014-11-26 01:50    By:ren      View:84      Download:1

Ledbanner in verilog code using FPGA SPARTAN-3E is displaying 0-9 in 2 seven segment display.  It will go from left to rigth or vise versa. And will reset fuction when press reset botton....

verilog Verilog

verilog code for 8 bit array multiplier

2014-11-26 11:55    By:sonu      View:179      Download:0

I have written verilog for 8 bit array multiplier . Accepts two 8 bit numbers and gives 16 bit result....

verilog VHDL

verilog code FIFO

2014-11-26 11:26    By:sebastianleong      View:141      Download:0

FIFO is a First-In-First-Out memory queue with control logic that managesthe read and write operations, generates status flags, and provides optionalhandshake signals for interfacing with the user logic. It is often used tocontrol the flow of data between source and destination. FIFO can beclassifie...

verilog Verilog


2014-11-24 13:27    By:duck      View:38      Download:0

In this paper design of 32 bit carry look ahead adder is done .the complexity is reduced by designing 8 4 bit cla block.  ...

verilog Verilog

verilog code for the GPS baseband processing

2014-11-26 23:03    By:jml8865      View:23      Download:0

GPS software receiver baseband processing verilog programs, by spread spectrum demodulation, intermediate frequency data synchronization process converts the raw navigation data...

verilog Verilog

32 processor> example code

2014-11-25 12:38    By:hailong710      View:1913      Download:1

<embedded real-time operating system μC/OS-Ⅱ classical examples- based on STM32 processor> example code, is the source code of the examples in this book, it is very helpful for μ-C/OS-II and the STM32 beginners, also can be used as reference to project development....


verilog code for ECC processor using karatsuba multiplier

2014-11-21 02:58    By:heena      View:30      Download:0

We are working on a project based on side channel attacks caused in a ECC processor while performing multiplication....

verilog Verilog

verilog code for vedic multiplier

2014-11-25 09:25    By:duck      View:40      Download:1

This is the source code for 8x8 vedic multiplier is designed by ancient vedic mathematics. It contains 16 sutra in that urdhva tiryagbhyam suytra is used. For the addition operation full adder is used ....

verilog Verilog

UART verilog code

2014-11-26 10:00    By:my_lover      View:62      Download:0

Including uart baud rate selected transceiver and the underlying file, use any FPGA, proven verilog code....

Driver Development Verilog

verilog code for uart transmission

2014-11-25 09:02    By:shabbeerahamad      View:31      Download:1

the low power low cost data transmission teq done by UART chech it once it's writen in verilog language and also it's a protocol based where you are going to specify your own rules for better communication...

vhdl Verilog

IEEE 754 32 bit - MATLAB

2014-11-23 09:34    By:Bluffer      View:32      Download:0

The IEEE Standard for Floating-Point Arithmetic (IEEE 754) is a technical standard for floating-point computation established in 1985 by the Institute of Electrical and Electronics Engineers(IEEE). Many hardware floating point units use the IEEE 754 stan...

Matlab Matlab
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