Search 32 bit risc processor in verilog code, 300 result(s) found

STM32F103 GPIO Usage Example Source code

Source Example code for STM32F103 GPIO Usage.The code contains a complete application example in MDK environment, which can be run directly in the Waveshare STM32F103 development board. ...

verilog code for uart transmission

the low power low cost data transmission teq done by UART chech it once it's writen in verilog language and also it's a protocol based where you are going to specify your own rules for better communication...

verilog code for the GPS baseband processing

GPS software receiver baseband processing verilog programs, by spread spectrum demodulation, intermediate frequency data synchronization process converts the raw navigation data...

verilog code for ECC processor using karatsuba multiplier

We are working on a project based on side channel attacks caused in a ECC processor while performing multiplication....

verilog code for 8 bit array multiplier

I have written verilog for 8 bit array multiplier . Accepts two 8 bit numbers and gives 16 bit result....

verilog code for vedic multiplier

This is the source code for 8x8 vedic multiplier is designed by ancient vedic mathematics. It contains 16 sutra in that urdhva tiryagbhyam suytra is used. For the addition operation full adder is used ....


In this paper design of 32 bit carry look ahead adder is done .the complexity is reduced by designing 8 4 bit cla block.  ...

Flash controller verilog code

This is the verilog code of Samsung K9 series Flash controller, it is complied and verified on FPGA development board, the verification environment is quartusii and modelsim combined platform. You can find the datasheet of K9 flash on the internet. The size of the flash is 1024*32....

verilog code FIFO

FIFO is a First-In-First-Out memory queue with control logic that managesthe read and write operations, generates status flags, and provides optionalhandshake signals for interfacing with the user logic. It is often used tocontrol the flow of data between source and destination. FIFO can beclassifie...

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