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VHDL for 16 BIT Time Domain Convolution

Convolution is a common operation in digital signal processing. In this project, I created a custom circuit implemented on the Nallatech board that exploits a significant amount of parallelism to improve performance compared to a microprocessor. Convolution takes as input a signal and a kernell The...
  vhdl      VHDL     

"Original" display __ __verilog_ _FPGA control _1602 debugging notes

FPGA control principle and LCD1602 debugging notes source code This information came from Baidu bases (http://wenku.Baidu.com/) You now see the document is used to hold rice Baidu base generated by the Download Manager This document's original address from Thank you for your support Hold rice...
  verilog      Verilog     

Based on FPGA LCD1602 drivers

I ready to adopt LCD1602 Character LCD as a vehicle to achieve " Hello World" Displays. Similar to that in the preceding MCU key programme of eliminating jitter 1 c language code, like, here we are ready to state machines, transplant LCD1602 driver code to Verilog HDL And driving LCD1602, show tha...
  Verilog HDL      VHDL     

Converts 24-BIT map format is 16-BIT BITmap format of the source code, including the format and RGB565 RGB555 format.

Source code is written entirely by me and tested to ensure that available.  You can convert 24 to 16 BITmap format BITmap format.  Enter the picture for 24-BIT BITmap format, the output file format can be 16-BIT map format.  The output format can be RGB555, RGB565 format can also b...
  Image Processing        C++     

A 16-BIT CRC program

Written in c language to calculate the 16-BIT CRC program entry parameters: data-the need to check array length-the number of bytes in the array...
  Algorithm        C     

16 BIT risc processor for computer hardware

16 BIT risc processor for computer hardware ...
  Algorithm      VHDL     

WarmOS 16-BIT real mode operating systems

WarmOS is a 16-BIT real mode operating system written with compilation, it includes some of the basic functions of the operating system should have, support implementation of the COM file format, providing some system API for programmers to write programs, and from the kernel to support Chinese disp...
  OS Develop        ASM     

16qam BIT error rate simulation

Digital communication, many modulation schemes, 16QAM is often used, it is the amplitude and phase shift keying. QAM modulation consists of 16QAM, 32QAM, 64QAM, this code emulation 16QAM constellation diagram, and BIT error rate BER and show the connections between them, and useful for learning and...
  Matlab        Matlab     

Auto meter software (Freescale 16 BIT microcontroller)

Freescale Hz256 MCU. The complete program code, mainly used in automobile instrument development, stepper motors, LCD display, AD, interruption, timed with a very good reference....
  Embeded        C     

VHDL 100 examples

Share online for some 100 examples suitable for FPGA learning for beginners. Inside there are some classic tricks....
  vhdl      VHDL     

Adder in VHDL

This program is an  adder for two floating numbers using VHDL language....
  vhdl      VHDL     

VHDL frequency meter

Using the frequency meter VHDL write and modules divided into clear, basic principles for the detection of pulse signals in the life cycle of a gate frequency, use the four-segment digital tube display...
  vhdl      VHDL     

Study on Turbo Code decoder and FPGA implementation.

Altera Quartus II software platform completed the decoding of Turbo codes based on Log-MAP algorithm for FPGA design and implementation. In Turbo yards of FPGA design and achieved part, main for has Turbo yards of compiled yards device in the all important module for has design and achieved, such as...
  vhdl      VHDL     

Realization virtual electric piano based on VHDL

This program design using VHDL language virtual keyboard. Hammond organ design consists of four modules: play module keyplay, auto play module AutoPlay, check gauges and display module table and frequency module fenpin. Plays modules keyplay under the key key indicates the pitch index_key; auto...
  vhdl      VHDL     

Fast Vedic Mathematic Multiplication using VHDL

This document contains the detail contents for the vedic multiplier in VHDL. It contents the detial explaination of the vedic multiplier process....
  vhdl      VHDL     

FPGA source audio signal Analyzer

Audio signal through consists of the OPAMP and the resistance of the 50Ohm impedance matching circuit to meet the input impedance 50 Ohm system requirements, calculation of signal power. In order to ensure that this signal is undistorted sampled signals through the cut-off frequency for the 10Khz an...
  vhdl      VHDL     

FPGA60 binary digital tube display VHDL code

FPGA design 60 binary counter, through 2 seven-segment digital tube that is out. Code is straightforward, emulation through, loaded on the FPGA Development Board and show success. Useful codes to get started....
  vhdl      VHDL     

BOOTH'S ALGORITHM STRUCTURAL VHDL CODE

BOOTH'S ALGORITHM IS USED FOR THE MULTIPLICATION OF TWO BINARY NUMBER IN COMPUTER ARCHITECTURE. AS THE PROCESSORS ARE GOOD IN SHIFTING OPERATION AND CANNOT EASILY DO THE MULTIPLICATION THAT'S WHY IT IS BEING USED....
  vhdl      VHDL     

verilog and VHDL files

library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_arith.all; use ieee.std_logic_unsigned.all; entity tff1 is port( clk: in std_logic; rst: in std_logic; q1: out std_logic); end tff1; architecture behavioral of tff1 is signal q: std_logic; begin process(clk,rst) begin...
  vhdl      VHDL     

Blif2VHDL format conversion tool

A BLIF to VHDL converter (51K compressed tar, with SunOS, Solaris, and Linux binaries. Source code (C++) included)....
  vhdl        C     

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