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counter Impl sp605

A counter implementation for sp605 xilinx board...
  Embeded      VHDL     

CQ original Web traffic statistics PHP+ MySQL multi

CQ original Web traffic statistics PHP+ MySQL multi-user version, function as follows : 1. Reading the daily pages of statistics and the number of IP traffic. 2. Show last 40 visitors information. 3. Location tracking visitors. 4. Provide digital text and graphics displays two figures. 5. Click on t...
  WEB(ASP,PHP,...)        PHP     

bidirectional LEDs A novel microprocessor interface circuit is described which...

bidirectional LEDs A novel microprocessor interface circuit is described which can alternately emit and detect light using only an LED, two digital I/O pins and a single current limiting re- sistor....
  Project Design        PDF     

Design Patterns of visitor, the visitor Design Pattern...

Design Patterns of visitor, the visitor Design Pattern...
  source in ebook        Visual C++     

visitor s count entry...

visitor s count entry...
  Windows Develop        C++     

MCU with verilog counter with MCU counter verilog...

MCU with verilog counter with MCU counter verilog...
  SCM        Others     

Frequency counter, automatic recording signal waveform, broadband, 4, auto

Frequency counter, automatic recording signal waveform, broadband, 4, auto-shift...
  Other systems      VHDL     

This is the one we do feel 60 counter operation with Quartus ii do. complete con...

This is the one we do feel 60 counter operation with Quartus ii do. complete contents can not see....
  Other systems        Others     

In this case the source code files by the user in accordance with the steps the...

In this case the source code files by the user in accordance with the steps the book itself is generated, "Example-2-1 Project_Navigator_Demo source" directory as the source code reference document. "Example-2-1 Project_Navigator_Demo counter" directory for a complete project, including source c...
  matlab      VHDL     

Through hardware description language programming to achieve the counter, can ac...

Through hardware description language programming to achieve the counter, can achieve a few 24 M...
  Windows Develop      VHDL     

counter written in VHDL....

counter written in VHDL....
  VHDL-FPGA-Verilog      VHDL     

4x4 KEYPAD median counter input, input their own definition of the median...

4x4 KEYPAD median counter input, input their own definition of the median...
  VHDL-FPGA-Verilog        Others     

counter

counter-microblaze.........
  Embeded-SCM Develop        C++     

the program is the band of 10 counters, with the home

the program is the band of 10 counters, with the home-reset function....
  VHDL-FPGA-Verilog        Others     

Freescale' s single

Freescale' s single-chip counters MC9SDG128B source for the pulse velocity measurement in the number of statistics, can achieve the speed measurement, distance measurement....
  SCM        C++     

quaternary counter module, the use of VHDL language, in which ISE8.1 tested mode...

quaternary counter module, the use of VHDL language, in which ISE8.1 tested model...
  VHDL-FPGA-Verilog        Others     

keil c program for single

keil c program for single-chip AT89S52. the use of the T2 counter, there is the frequency of functional...
  SCM        Others     

Qcounter, used to test the board installed by the total incident. Repeat the loa...

Qcounter, used to test the board installed by the total incident. Repeat the load...
  Com Port        Visual C++     

maxplus2 VHDL environment for the development of free counter preparation proced...

maxplus2 VHDL environment for the development of free counter preparation procedures...
  VHDL-FPGA-Verilog        Others     

CPLD

CPLD-based counters realize optical ranging, single-chip microcomputer that contains timing control and realize the adoption of Verilog simulation...
  MiddleWare      VHDL