Sponsored links

Top Source Codes

FPGA60 binary digital tube display vhdl code

FPGA design 60 binary counter, through 2 seven-segment digital tube that is out. code is straightforward, emulation through, loaded on the FPGA Development Board and show success. Useful codes to get started....
  vhdl      VHDL     

vhdl code for latch_ff_comb for d_comb ckt in vhdl

library ieee; use ieee.std_logic_1164.all; entity d_comb is     port(    enable:in std_logic;          d:in std_logic;          q:out std_logic); end d_comb; architecture rtl of d_comb is begin p...
  vhdl      VHDL     

vhdl code for different adders

A multiplier is one of the key hardware blocks in most digital and high performance systems such as FIR filters, digital signal processors and microprocessors etc. With advances in technology, many researchers have tried and are trying to design multipliers which offer either of the following- hi...
  vhdl      VHDL     

vhdl code for Adder / Subtractor

LIBRARY ieee; USE ieee.std_logic_1164.all; USE ieee.std_logic_unsigned.all; ENTITY adder IS PORT(Cin        : IN STD_LOGIC; Carry        : IN STD_LOGIC;  X,Y        : IN STD_LOGIC_VE...
  Matlab      VHDL     

RSA vhdl code

Here, we present the first available open-source 512 bit RSA core. This is an early prototype version of a full FIPS Certified 512-4096 capable RSA Crypto-core which will be on sale soon. The version provided, has not the same performance than the final product since it was a proof of concept tha...
  verilog      Verilog     

Blif2vhdl format conversion tool

A BLIF to vhdl converter (51K compressed tar, with SunOS, Solaris, and Linux binaries. Source code (C++) included)....
  vhdl        C     

Rs232 using vhdl

Disign RS232 controller using vhdl on Altera DE2. This is a serial module which is useful for embed systems....
  vhdl      VHDL     

vhdl frequency meter

Using the frequency meter vhdl write and modules divided into clear, basic principles for the detection of pulse signals in the life cycle of a gate frequency, use the four-segment digital tube display...
  vhdl      VHDL     

Realization virtual electric piano based on vhdl

This program design using vhdl language virtual keyboard. Hammond organ design consists of four modules: play module keyplay, auto play module AutoPlay, check gauges and display module table and frequency module fenpin. Plays modules keyplay under the key key indicates the pitch index_key; auto...
  vhdl      VHDL     

vhdl simulation of direct sequence spread spectrum communication system

Direct sequence spread spectrum communication system : Contains: 信源 、 扰码 、 交织 、 直扩 、 BPSK 调制、 解调 、 相关 、 Interwoven solutions for 、 解扰 Several parts through QuartusII 9 compiler testing is feasible. code original containing syste...
  vhdl      VHDL     

vhdl code for counter

Here is the code for counter in vhdl. --signal slow_clk : std_logic := '0';  --signal clk_divider : std_logic_vector(23 downto 0) := x"000000"; -- Clock divider can be changed to suit application.  -- Clock (clk) is normally 50 MHz, so each clock cycle  -- is 20 ns. A clock...
  vhdl      VHDL     

Wavelet transform and vhdl

Wavelet transform in JPEG2000 part of the vhdl source code. JPEG2000 The core algorithm is based on Discrete Wavelet transform. Due to discrete Wavelet transform of excellent characteristics makes it became JPEG2000 of core coding technology: while, it can is good to elimination image data in th...
  vhdl      VHDL     

Radix-8 Booth Encoded Modulo

vhdl code for Radix-8 Booth Encoded Module  Multipliers With Adaptive Delay for High Dynamic Range Residue Number System...
  vhdl      VHDL     

Discrete Cosine Transform(DCT/IDCT) in vhdl

the Project aim is to design DCT and IDCT in vhdl. DCT is used in image compression to compress the JPEG image. This file contains DCT and IDCT blocks and top module which integrates two blocks and testbench to test the two modules....
  vhdl      VHDL     

Waveform generator and sine waveforms generator based on vhdl language

Waveform generator and sine waveforms generator based on vhdl language, a total of two files, communication development platform. This is a typical black wave generator program and an arbitrary waveform generator program, members can refer to the study, introduction to vhdl is also helpful to-This i...
  vhdl      VHDL     

vhdl for 16 bit Time Domain Convolution

Convolution is a common operation in digital signal processing. In this project, I created a custom circuit implemented on the Nallatech board that exploits a significant amount of parallelism to improve performance compared to a microprocessor. Convolution takes as input a signal and a kernell The...
  vhdl      VHDL     

vhdl code for multiplexer

vhdl program for multiplexer we can write 4:1 mux also like this its very simple code for beginers to understand...
  vhdl      VHDL     

ADC vhdl code

Using VHDI Dispaly character. shows a simulation of a properly working implementation of LCD controller hardware. This simulation demonstrates the way the disparate state machines work together. As the initialization sequence finishes, the command states of the main state machine begin....
  vhdl      VHDL     

verilog and vhdl files

library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_arith.all; use ieee.std_logic_unsigned.all; entity tff1 is port( clk: in std_logic; rst: in std_logic; q1: out std_logic); end tff1; architecture behavioral of tff1 is signal q: std_logic; begin process(clk,rst) begin...
  vhdl      VHDL     

I2CvhdlASDASDADASD

Content is too short. Attention please: codes without good description will be deleted and you won't get any points. Please describe it better to get more points....
  vhdl      VHDL     

Hot Search Keywords


    Sponsored links
3d 忙路卤 |  C8051F340 c2 interface |  xmpp c# |  bitmap process |  imaqt Powered by: Maian Guestbook New?name=Gue hi hit 5 hi |  自己编写的小型shell 实现了多重管道,输入输 |  solution pattern classification duda?mop=AddEntry&op=modload |  imaqt Powered by: Maian Guestbook New?tbs=qdr:w&?name=G hi |  tasm Add Article PHP Link Directory puppetry?mop=Add |  jy online |  Toy FDTD |  GUESTBOOK asp inurl:asp? ct=c&action=sign moose and 1=1 and |  6410 ov7670 Skinned by: Web Design Directory Add Article |  first and follow set in compiler?mop=AddEntry?op=modload&nam |  sim900 codevision?name=Guestbo hit 163 hre hit 10 hr hit 5 |  vibrato Template By Free PHPLD Templates Submit Article R |  SPI FLASH TOOL SCHEMATIC& sa=U& ei=A93MT7SINOmfmQWb8tm |  ? Powered by Advanced Guestbook=?action=add?mop=AddEntry&op |  MPC03 LH drivers |  Opengl 游戏 天空盒‘ |  design and evaluate the performance of an adaptive filter us |  铁路平板车装货 |  视频采集卡 驱动 |  Instant Insanity Ultimate Guestbook Version Avis&ct=clnk |  QTR9215&prev= search?q= submit |  minimum sum ldpc decoder |  STM32 spi flash powered by TPK Guestbook lash&ct=clnk?mop= |  MFC24? |  NEC? Skinned by: Web Design Directory Add Article?n |  2300 gsm?name=Guestbook |  matlab code for rssi |  kmeans 三维数据 |  visibility restoration of single hazy images captured in dif |  cc1100 18f Template By Free PHPLD Templates Add Article R |  Csc8051f340 interfacing with cs5490 |  ? Powered by Advanced Guestbook=?action=add RK=0 RS=B7boDd |  发现网络中活动的主机 |  hand detection recognition opencv |  rmi program for tic tac toe?mop=AddEntry&op=modload&name=Gue |  sed1335 arduino Powered by Advanced Guestbook registrar?= |  dxf reader spline Member Login to Submit Article lane&ct=cln |  areacut?mop=AddEntry&op=modload&name=hit 1 hit 1 hre hit 1 |  fourier descriptor matlab code |  Super resolution in painting?mop=AddEntry&op=modload&name=G |  PRMA protocol |  nrf24l01 89c51?? |  geopdf |  shadow removal in matlab |  laws texture energy filter in c |  product ANF1648 |  simulation robot opengl c |  ?mop=AddEntry&op=modload&name=Guestbook hit 1 hit hit 3 hre |  PDCP |  arduino pt100 |  LCD12232 |  MSP430 dc motor pwm |  a law read Member Login to Submit Article separate&ct=clnk?n |  蟺 4 DQPSK |  bldc pid control |  Rate Monotonic scheduling algorithm |  nau7802 arduino |  VocEnhancer game file for c sharp |  VTK 三维重建 |  APB to wishbone bridge?mop=AddEntry&name=Guestboo&op=modload |  facerecproov |  assembly language DIGITAL CLOCK 8086 |  RGB888 YUV Designed by: PHPLD Your Site Submit Article f |  dqpsk |  pt2262 pt2272 |  Monte Carlo simulation Power System Reliability Evaluation |  bubble shooter android |  ACLR matlab |  struts2 extjs JSON example?mop=AddEntry&op=modload&name=gues |  nRF24L01 mikroC |  MPI parallel dijkstra algorithm |  Non linear Timeline |  C17 ISCAS85 vhdl code ctf= rdr T?cmd=sign |  dsp2812 pi算法 |  vhd鍥涗汉鎶㈢瓟鍣╨涓庢尝褰豢鐪? |  at mega projects |  Monte Carlo triangle matlab?mop=AddEntry&name=Gu&op=modload |  DNA computing |  bscb图像修复程序实现 |  DSS ahp JAVA CODE |  host to host congestion control for TCP?mop=AddEntry&op=modl |  stm32 f407 |  MM1 queue simulation |  receiver heterodyne simulink?mop=AddEntry&name=Gu&op=modload |  digital alarm clock xilinx vhdl fsm |  project on pt100 temperature controller circuit |  decriptare mansfield?name=hit hit 2 href hit 6 hr hit 1 hr |  30f4011 BLDC Designed by: PHPLD Your Site Submit Article? |  客户端更新 |  ns2 aqua sim for meandering current mobility model |  mobile news wap |  Video Capture driver em2860 |  map matching algorithm |  CWatershedSeg::Assign distances |  php java html |  Gray Scale Histogram Equalization |