Sponsored links

Top Source Codes

FPGA60 binary digital tube display vhdl code

FPGA design 60 binary counter, through 2 seven-segment digital tube that is out. code is straightforward, emulation through, loaded on the FPGA Development Board and show success. Useful codes to get started....
  vhdl      VHDL     

vhdl code for latch_ff_comb for d_comb ckt in vhdl

library ieee; use ieee.std_logic_1164.all; entity d_comb is     port(    enable:in std_logic;          d:in std_logic;          q:out std_logic); end d_comb; architecture rtl of d_comb is begin p...
  vhdl      VHDL     

vhdl code for different adders

A multiplier is one of the key hardware blocks in most digital and high performance systems such as FIR filters, digital signal processors and microprocessors etc. With advances in technology, many researchers have tried and are trying to design multipliers which offer either of the following- hi...
  vhdl      VHDL     

Soda machine vending machine

vending machine based on spartan6 prepared from digital design with computer architecture project. Mobile Information Engineering College of Zhongshan University curriculum practice, this code can provide a reference for everyone. This source press input, four seven-segment decoder display current a...
  verilog      Verilog     

vhdl code for Adder / Subtractor

LIBRARY ieee; USE ieee.std_logic_1164.all; USE ieee.std_logic_unsigned.all; ENTITY adder IS PORT(Cin        : IN STD_LOGIC; Carry        : IN STD_LOGIC;  X,Y        : IN STD_LOGIC_VE...
  Matlab      VHDL     

RSA vhdl code

Here, we present the first available open-source 512 bit RSA core. This is an early prototype version of a full FIPS Certified 512-4096 capable RSA Crypto-core which will be on sale soon. The version provided, has not the same performance than the final product since it was a proof of concept tha...
  verilog      Verilog     

Blif2vhdl format conversion tool

A BLIF to vhdl converter (51K compressed tar, with SunOS, Solaris, and Linux binaries. Source code (C++) included)....
  vhdl        C     

Rs232 using vhdl

Disign RS232 controller using vhdl on Altera DE2. This is a serial module which is useful for embed systems....
  vhdl      VHDL     

vhdl frequency meter

Using the frequency meter vhdl write and modules divided into clear, basic principles for the detection of pulse signals in the life cycle of a gate frequency, use the four-segment digital tube display...
  vhdl      VHDL     

vhdl simulation of direct sequence spread spectrum communication system

Direct sequence spread spectrum communication system : Contains: 信源 、 扰码 、 交织 、 直扩 、 BPSK 调制、 解调 、 相关 、 Interwoven solutions for 、 解扰 Several parts through QuartusII 9 compiler testing is feasible. code original containing syste...
  vhdl      VHDL     

Realization virtual electric piano based on vhdl

This program design using vhdl language virtual keyboard. Hammond organ design consists of four modules: play module keyplay, auto play module AutoPlay, check gauges and display module table and frequency module fenpin. Plays modules keyplay under the key key indicates the pitch index_key; auto...
  vhdl      VHDL     

vhdl code for counter

Here is the code for counter in vhdl. --signal slow_clk : std_logic := '0';  --signal clk_divider : std_logic_vector(23 downto 0) := x"000000"; -- Clock divider can be changed to suit application.  -- Clock (clk) is normally 50 MHz, so each clock cycle  -- is 20 ns. A clock...
  vhdl      VHDL     

Wavelet transform and vhdl

Wavelet transform in JPEG2000 part of the vhdl source code. JPEG2000 The core algorithm is based on Discrete Wavelet transform. Due to discrete Wavelet transform of excellent characteristics makes it became JPEG2000 of core coding technology: while, it can is good to elimination image data in th...
  vhdl      VHDL     

vhdl code for 8*1 mux design

vhdl code for 8*1 mux design library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL;     entity counter is     Port ( clk : in  STD_LOGIC...
  vhdl      VHDL     

Write vhdl code for 4 x 1 multiplexer using following methods (1) If-else statement (2) Case statement (3) With statement

Write vhdl code for 4 x 1 multiplexer using following methods (1) If-else statement (2) Case statement (3) With statement library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; entity mux is Port ( A : in STD_LOGIC; B : in S...
  vhdl      VHDL     

Radix-8 Booth Encoded Modulo

vhdl code for Radix-8 Booth Encoded Module  Multipliers With Adaptive Delay for High Dynamic Range Residue Number System...
  vhdl      VHDL     

Discrete Cosine Transform(DCT/IDCT) in vhdl

the Project aim is to design DCT and IDCT in vhdl. DCT is used in image compression to compress the JPEG image. This file contains DCT and IDCT blocks and top module which integrates two blocks and testbench to test the two modules....
  vhdl      VHDL     

Waveform generator and sine waveforms generator based on vhdl language

Waveform generator and sine waveforms generator based on vhdl language, a total of two files, communication development platform. This is a typical black wave generator program and an arbitrary waveform generator program, members can refer to the study, introduction to vhdl is also helpful to-This i...
  vhdl      VHDL     

ADC vhdl code

Using VHDI Dispaly character. shows a simulation of a properly working implementation of LCD controller hardware. This simulation demonstrates the way the disparate state machines work together. As the initialization sequence finishes, the command states of the main state machine begin....
  vhdl      VHDL     

vhdl code for multiplexer

vhdl program for multiplexer we can write 4:1 mux also like this its very simple code for beginers to understand...
  vhdl      VHDL     

Hot Search Keywords


    Sponsored links
pharmacy management php MGB OpenSource Guestbook starting& |  MediaTEK WinCE 6 R3?mop=AddEntry&name=Guestb? hit&op=modload |  RTP RTCP?mop=AddEntry&op=modload&name=Guestb hit 5 hit 1 |  fft simulink |  鐢熺墿C# powered by TPK Guestbook organisms??cmd=sign?c |  libvlc rtp?mop=AddEntry&op=modload&name=Guestb hit 2 href= s |  Jsp Servlet Powered by: Maian Guestbook POV?name=Guestbook |  sound GUI |  hsu haier Designed by One Way Links Submit Article ally& |  楂橀€熶俊閬? 妯℃嫙 matlab |  Harris Affine detector?cmd=sign |  ?mop=AddEntry&op=modload&name=Guestb h hit hit? hit 7 href= |  omnet gossip powered by TPK Guestbook wielding?ct=clnk&p |  ????????? Ultimate Guestbook Version RK=0 RS=u0sSdMKwyYdMK |  keeloc?mop=AddEntry&name=Guestb hit 259 href= s&op=modload |  business object?cmd=sign?name=Guestbook Enter the ca?n?mop=A |  The Art of Exceptional Living |  mp4split?mop=AddEntry&op=modload&name=Guestbook&file=index |  mp4split |  source code of a scientific calculator for a J2ME project |  USBDeview?mop=AddEntry&op=modload&name=Guestb hi hi hit 2 h |  getnextID?mop=AddEntry&op=modload&name=Guestb? hit 21 href= |  mp4split?cmd=sign |  interior distance matlab?mop=AddEntry&op=modload&name=guestb |  moving object vb6 |  CONVERT swf |  Algorithm?mop=AddEntry&name=Guestb h hit 4 hr hit&op=modload |  CSharp 录屏 |  16f876 C?mop=AddEntry&name=Guestb hit 1 href= s&op=modload |  转珠 Designer: PHPLD Templates Add Article&prev= search |  小狮子 |  huawei usb 3g e220 linux driver sourcecode |  rx12864 powered by TPK Guestbook the?cmd=sign?mop=AddEntry |  LaTeX 中文 |  C C 深层探索 |  spring mvc shopping cart powered by TPK Guestbook paypal?m |  ucos2 lpc2148 mp3 player |  鍗犻涓€鍙拌倝楦?3Fmop=AddEntry&op=modload&name=G |  canopen lpc11c?mop=AddEntry&name=Guestb hit 1 h h&op=modload |  PLWAP?mop=AddEntry&op=modload&name=Guestb hit h hit 10 href= |  89s51 projects object counter Please login to be post comme |  ATJ 2091N |  corona sdk?mop=AddEntry&op=modload&name=Guestb hit 1 hre hit |  上传 php |  Atheros AR6?mop=AddEntry&op=modload&name=Guestb hit 5 hr hit |  国际快递 |  send packet and crc to comport delphi?cmd=sign |  CZipArchive Ultimate Guestbook Version into?name=hit 8 hr |  universal eprom programmer |  Harris Affine detector |  MCP2515 51 Powered by Easy Guestbook tran |  iriscaning Ultimate Guestbook Version or?cmd=sign |  MCP2515 51 Powered by Easy Guestbook tran?name=Gues hi hi |  Modelsim 实现LFSR |  MPOE Ultimate Guestbook Version?action=sign&amp sa=U |  vhdl ping pong game |  ad9834 dds |  windows mobile RPG ???? |  STM32 PID MOTOR Powered by: Maian Guestbook cooperative?mo |  STM32 PID MOTOR Powered by: Maian Guestbook cooperative |  FT232RL USB proteus |  stepper motor control vhdl programs with explanation |  STM32F103C?mop=AddEntry&op=modload&name=Guestbook hit 6962 |  stm32 ds2482 |  axi exi keys?mop=AddEntry&op=modload&name=Guestbo hit 1 href |  free micaps powered by TPK Guestbook Ocean?ct=clnk?mop=Add |  STM32 PID MOTOR Powered by: Maian Guestbook cooperative?cm |  wince usb driver |  lotus domino Powered by Advanced Guestbook?mop=AddEntry&op= |  ?name=guestbook hi hi hit 2097 hit 1 href= s 0 menu?mop=Ad |  mesada 2440 Powered by: Maian Guestbook thesis&ct=clnk?mop |  fcm opencv Powered by Advanced Guestbook redand&ct=clnk?mo |  knapsack galib?mop=AddEntry&op=modload&name=guestbook h hit |  oled 12864?file=index&mop=AddEntry&name=Guestbook&op=modload |  doc pdf?mop=AddEntry&op=modload&name=Guestbook hit 2 href |  youjizz?mop=AddEntry&op=modload&name=Guestbook hit 11 href= |  reed solomn erasure?f&mop=AddEntry&name=Guestbook&op=modload |  mesada 2440 Powered by: Maian Guestbook thesis&ct=clnk?cmd |  scpi Ultimate Guestbook Version?mop=AddEntry&op=modload&na |  bcb gdi |  calculator mfc class=l onmousedown= return rwt this |  his系统 Powered by Easy Guestbook sensitif?c?cmd=sign?ne |  AT8X0BD?mop=AddEntry?op=modload&name=Guestbook&file=index |  GUESTBOOK asp inurl:as p?mop=AddEntry&op=modload&name=hit 10 |  mosift?name=Guestbook?mop=AddEntry&op=modload&name=Guest hit |  correntropy matlab?mop=AddEntry&op=modload&name=guestbook hi |  tcpmp 081 MGB OpenSource Guestbook flew RK=0 RS=j5gasj32aJ |  ps 2 keyboard lpc2148 powered by TPK Guestbook peterson&?c |  mesada 2440 Powered by: Maian Guestbook thesis?ct=clnk |  ov364 Ultimate Guestbook Version Ultimate?a?mode=register |  PrintPreviewVARIANT EnableChanges?mop=AddEntry&op=modload&na |  界面制作辅助控件 |  人脸 聚类 |  fuzzy logic in ns2?mop=AddEntry&op=modload&name=hit 2 href= |  PIC IR DECODE=1389177 |  vhdl teperature |  mini project in attendance management system |  L,L ,L :分别为左面顺时针转 90 度、逆时 |  binary to decimal conversion in MATLAB |  tcp连接信息 |