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DESIGN AND IMPLEMENTATION OF DIFFERENT multiplierS using VHDL

multipliers are key components of many high performance systems such as FIR filters,  microprocessors, digital signal processors, etc. A system’s performance is generally  determined by the performance of the multiplier because the multiplier is generally the  slowest clement in...
  vhdl      VHDL     

VEDIC multiplier using PROPOSED 4 BIT ADDER-(URDHVA TIRYAKBHYAM)

VEDIC multiplier TAKES LESS TIME TO PERFORM THE MULTIPLICATION OPERATON using THE URDHVA TIRYAKBHYAM ALGORITHM FROM THE VEDAS.THIS SOURCE CODE IS A 4 X 4 VEDIC multiplier using PROPOSED 4 BIT ADDER...
  verilog      Verilog     

radar signals analysis and processing using matlab

radar signals analysis and processing using matlab. this is the matlab codes for the book of radar signals analysis and processing using matlab...
  Matlab        Matlab     

3. Analog-to-Digital conversions using Vcc as a voltage reference

Ultimately, my goal with this chip is to sample some voltages and then relay that information to a computer (via the UART, which we now have running) and an LCD display. Now that the chip can talk to a computer we can start experimenting with the analog-to-digital converter. For experim...
  CSharp        C     

LTE 3GPP channel modeling using matlab

LTE 3GPP channel modeling using matlab. Generates the correlated tap coefficients of the MIMO tapped delay line % model to be used during one iteration of the main loop. The function % performs a double interpolation, first in the fading vector domain, % to collect the fading samples corres...
  Communication        Matlab     

PCA Based Face Recognition System using ORL Database

This package implements a well-known PCA-based face recognition method, which is called 'Eigenface'. The program is easy to use. Furthermore, a sample Project file 'ProjectPCA.m' is added that demonstrate how to use, ORL training and test database is also included to show Performance comparison for...
  Matlab        Matlab     

two-wheels balancing robot controller using LQR method

LQR control method to achieve the balancing robot balancing effect analysis of Q-value to determine   best contribute to the k-value. Requires three angle control for balancing robot, robot body angle, wheel forward, horizontally transmitted and control end through the three corners to achieve...
  Matlab        Matlab     

Designing of Bit serial type Galois Field GF(2m) multiplier

In this era, cryptography is used for secure transmission of data. Several methods are present which can be used in cryptography. But most fascinating method is finite field theory[1]. As finite field is having the capability to store and handle the data efficiently. Property of binary finite fi...
  Crypt_Decrypt algrithms      Verilog     

wallace multiplier trees for 4:2

hi code very nice runing and simulation.  new multiplier block using m:3 (4≤m≤10)counters has been presented in this paper, and the inner structure of all compressors has been illustrated in detail. Furthermore, it is even faster and more efficient (Considering PDP)...
  vhdl      VHDL     

hardware specialist

hardware specialist Detecting CPU memory hardware, and more hardware devices detected...
  硬件专家        Visual C++     

HIGH SPEED URDHAVA multiplier

A high speed processor depends greatly on the multiplier as it is one of the key hardware blocks in most digital signal processing systems as well as in general processors. This project presents a high speed 8x8 bit Vedic multiplier architecture which is quite different from the Conventional method...
  vhdl      VHDL     

low power reversible logic multiplier 8X8

In this study a novel reversible multiplier is presented. Reversible logic can play a significant role in computer domain. This logic can be applied in quantum computing, optical computing processing, DNA computing, and nanotechnology. One condition for reversibility of a computable model is that...
  vhdl      VHDL     

ECC Cryptography using Verilog

This Program I have developed it for Elliptic Curve Cryptography using HDL language namely Verilog ! hope all the algorithm steeps are included inside it ! enjoy please leave your comment !...
  Algorithm      Verilog     

vedic multiplier 32 bit

design of high speed 32 bit vedic multiplier using vedic mahematics. this has a very less delay than other type of multipliers....
  verilog      Verilog     

multiplier 2 digits 4bit

This is multiplier 2 digits 4bit, solution for Part4 Lab 6 - exercise of Altera for kit DE2 The multiplier include 2 digits 4bit input, I use switches SW11−8 to represent the number A and switches SW3−0 to represent B.  The hexadecimal values of A and B are to be displayed on the...
  verilog      Verilog     

64bit mac using wallace mltiplier

hiiiiiiiiii this is very good paper.this paper represent about 64 bit multiplier using wallace multiplier...
  Windows        C     

booth multiplier

attached is the code for implementation of booth multiplier in verilog. this multiplier can be used as  multiplier in various other programs rather than a normal multiplier for a quicker smulation....
  Embeded      Verilog     

Obtaining a unique hardware ID

This is article written by me, Michael Haephrati, about the search for a reliable hardware ID        The WMI set of classes  Windows provides a set of classes that can be used for most hardware enumeration and identification tasks, whic...
  software        C++     

A C++ Mini Project on Controlling Electrical Devices using Printer Port

++ Mini Project on Controlling Electrical Devices is developed, the software program and the hardware circuit work interactively to generate appropriate signals to switch the connected devices ‘On’ or ‘Off’. As in the Interface to switch a device On/Off it is required to enter the valid...
  Driver Development        C++     

Vulnerability Evaluation of Network Traffic using Set Theoretic Analysis for Joint Security and Routing

Abstract—The routing protocols in the wireless networks disclose the fact that security and routing cannot be established jointly. Investigation is done on the impact of node capture attacks on the confidentiality and integrity of network traffic. I develop a method called GNAVE (Greedy Node...
  Java Development        Java     

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