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SOPC technology using Verilog create Hello program

SOPC technology FPGA Verilog hardware description language, writing in niosII  program    using Altera chip...
  verilog      VHDL     

Four lights switch of marquee (marquee program in Verilog_hdl languages)

This is a learning Verilog HDL good information, suitable for beginners, explained in detail, from the light into the deep, learning the language, it is a hardware description language for good stuff, good material!...
  verilog      Verilog     

Verilog simulation filters

Verilog procedural simulation filters 16-order using the Adder and multiplier 40KHZ 16-bit into and out...
  verilog      Verilog     

DDS_Dual_ports Verilog implementation

DDS_Dual_ports Verilog implementation, you need to download experiment, according to their own needs to be modified in order to achieVe the purpose of its...
  verilog      Verilog     

Verilog serial port serial port receiVe module receiVer module

Verilog serial port serial port receiVe module receiVer module, contains the BPS modules, leVel detection module and the control module...
  verilog      Verilog     

Spring and Velocity for advanced applications

See contents Spring and Velocity for advanced applications Velicity utility classes defined using Spring managed bean...
  Java Development        Java     

Using FPGA Verilog HDL simulation class I2C communication

Using FPGA Verilog HDL simulation class I2C communication...
  verilog      Verilog     

Floating-point multiply Verilog FPGA

Digital multiplier, as an integral part of modern computers, their design work and more and more people's attention. This paper, hardware description languages Verilog HDL design a floating-point multiplier based on complement one multiplication and design functions and better flexibility. Th...
  verilog      Verilog     

I2C Verilog

I2C Verilog files. Define a simple interface of I2C. After testing to ensure the using....
  verilog      Verilog     

ws2801_driVer

;************************************************************************************************ DRIVeR_WS2801: ; STAR FOR WS2801 WAIT 500US ;------------------------------------------------------------------------------ CLK_SET_LOW500US: cbi PORTB,WS2801_CLK LDI TEMPA,10 LOOP_WAIT_500US:...
  Driver Development        ASM     

4-bit counters Verilog code

One of the basics of Verilog source code, binary counters for a 4. Both counts can be achieVed to realize the frequency of the clock signal, so that is one Very practical introduction to Verilog code. On the basis of this code, you can make a variety of changes, to achieVe different functionality....
  verilog      VHDL     

DDR2 controller, Verilog source code

Using Verilog prepared of DDR2 controller, achieVed has DDR2 of reads and writes function, in Xilinx vietex5 Shang to achieVed, achieVed has Imaging algorithm in the of data turn home,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,...
  verilog      Verilog     

Introduction to Verilog

This article introduces the basics of Verilog HDL language, to enable the beginner to quickly grasp the HDL Design methods, preliminary reports and to master the basics of Verilog HDL language, to be able to read simple design code and Enough to make some simple Verilog HDL design modeling...
  verilog      Verilog     

I2C SlaVe AND I2C Master

I2C SlaVe is inside and the I2C Master and contain the emulator as well as waVe files, I took a look at, particularly easy to understand...
  verilog      Verilog     

PTSPserVer

PTSP serVer and client, you can implement a simple data transfer socket, serVer and client code,PTSP serVer and client, you can implement a simple data transfer socket, serVer and client code,PTSP serVer and client, you can implement a simple data transfer socket, serVer and client code, PTSP serVe...
  Java Development        Java     

Guestbook code

A JSP application achieVe guest book Guest book admin management JavaBean,Taglib, technology For JSP beginner to learn to use...
  Java Development        Java     

JdeVeloper App

Aplicacion de ejemplo para la implementacion de Webservices, JAX-WS, Store Procedures, SQL, XML, etc....
  Java Develop        Java     

PLL LMX2531 Verilog Configurator

Source Verilog programming, registers are used for configuring the PLL LMX2531, the output frequency is 1 GHz, has proVen the value of the register, the clock output frequencies without problems, written with three-state machines, incidentally, one AD device configured, refer the reader to key refer...
  verilog      Verilog     

"Original" display __ __Verilog_ _FPGA control _1602 debugging notes

FPGA control principle and LCD1602 debugging notes source code This information came from Baidu bases (http://wenku.Baidu.com/) You now see the document is used to hold rice Baidu base generated by the Download Manager This document's original address from Thank you for your support Hold rice...
  verilog      Verilog     

H264 IP core written in Verilog

A well-written H.264/AVC Baseline Decoder IP core. Usage instructions can be found under directory : trunk/doc/nova_spec.doc Also contains testbench file. Extremmely easy to understand....
  verilog      VHDL     

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