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AddCustomer

The application should let a user maintain a list of customers. After selecting a customer the user should be able to specify in what states the customer does business in. By clicking the "Save all changes"-button all the changes made by the user should be stored in a MySQL database. List of clie...
  Other        PHP     

Full Adder

module full_Adder(     output reg sum,     output c_out,   // carry out     input a,     input b,     input c_in);    // carry in      always @(*)        begin       &n...
  add      Verilog     

PArticle Swarm Optimization Algorithm

In computer science, pArticle swarm optimization (PSO) is a computational method that optimizes a problem by iteratively trying to improve a candidate solution with regard to a given measure of quality. PSO optimizes a problem by having a population of ca...
  Matlab        Matlab     

carry look ahead Adder

This is carry look ahead Adder which is very useful in order to Add 4 bit thing . A carry-lookahead Adder (CLA) is a type of Adder used in digital logic. A carry-lookahead Adder improves speed by reducing the amount of time required to determine carry bits. It can be contrasted with the simpler,...
  vhdl      VHDL     

Full Adder in verilog

A simple verilog code for full_Adder. It is tested in both simulator and xilinx spartan3E fpga board. ...
  verilog      Verilog     

Multi-objective PArticle Swarm Optimization algorithm

Foreign classic multi-objective PArticle Swarm Optimization, improved version of the 2012 MOPSO, very suitable for beginners. Is a classical algorithm for multi-objective PArticle Swarm Optimization. Study of pArticle swarm students must see an Article of the code. Foreign classic multi-objective Pa...
  Algorithm        Matlab     

An Additive watermarking image based on PSO

Many researchers were used the Additive method of digital watermarking images which we quote for example Anuradha and Rudresh Pratap Singh (2006) [1]. However, this paper proposes an Additive watermarking method by invoking PArticle Swarm Optimization (PSO) technique in wavelet domain to improv...
  Matlab        Matlab     

realtime pArticle based fluid simulation

realtime pArticle based fluid simulation - program,实时基于例子的流体仿真,SPH程序.realtime pArticle based fluid simulation - program,实时基于例子的流体仿真,SPH程序realtime pArticle based fluid simulation - program,实时基于例子的流体仿真,SPH程序realtime pa...
  Algorithm        C++     

PArticle Filter Tracking

In the Kalman filter the density propagation changes from one Gaussian to… another Gaussian distribution. What changes is the mean and variance. This is very good if our system is linear and the noise is Gaussian. But if it isn’t (i.e. cluttered data etc.) – Kalman fails  This is where th...
  Matlab        Matlab     

The simulation of pArticle collisions using computational fluid dynamics Matlab

PArticle collisions are simulated using computational fluid dynamics method, you can customize a variety of parameters including the number of pArticles, the pArticle density, RADIUS and so on. Can be used to coordinate of gravity or gravity-free space....
  Matlab        Matlab     

Optimum Design of PID Controller in AVR System Using PArticle Swarm Optimization

In this project you can find optimal coefficient for PID-controller AVR system by using pArticle swarm optimization algorithm...
  Matlab        C++     

Generic pArticle filter

Generic pArticle filter: Note: when resampling is performed on each step this algorithm is called the Bootstrap pArticle filter...
  Algorithm        Matlab     

ripple carry Adder

it is xilix project. it is generic code for ripple carry Adder and its test bench is also their. it has minimum delay. it is checked. its working properly.      ...
  verilog      Verilog     

CMOS FULL-AddERS FOR ENERGY-EFFICIENT ARITHMETIC APPLICATIONS

In electronics, an Adder or summer is a digital circuit that performs Addition of numbers. In many computers and other kinds of processors, Adders are used not only in the arithmetic logic unit(s), but also in other parts of the processor,...
  vhdl      VHDL     

Simple Full Adder Verilog Code

This is a simple 1 bit full Adder verilog code `timescale 1ns / 1ps module 1BitFullAdder ( input a, input b, input cin, output s, output cout ); assign s = a ^ b ^ cin; assign cout = (a & b) | (a & cin) | (b & cin); endmodule //Test Bench...
  Verilog      Verilog     

Series of Addition

 Addtion of 8bit Array in a asembly language programm.  Addtion of 8bit Array in a asembly language programm. Explanation: · This program Adds two 8 - bit numbers. · The program has been developed using emu80...
  Assembly Language        ASM     

Carry ripple Adder (16 bit - not use Full Adder)

this is a CSA - Carry ripple Adder.   for 16 bit   it doesn't run by cascade of full Adders.   it all made up of P, G and sum gates....
  Algorithm      Verilog     

Addersubtractor

AVIAddXSubs is a simple to use, free program to subtitle videos converting the original srt files you may have. Its services are useful in cases your hardware player is not able to show the subtitles directly from srt or even if it does the result is not satisfactory. Using...
  verilog      Verilog     

4-bit prallel Adder

a>    Half Adder module ha(sum,ca,a,b);     input a,b;     output sum,ca;              assign sum= a^b;         &nbs...
  verilog      Verilog     

CMOS FULL-AddERS DESIGN USING DPL LOGIC

We present two high-speed and low-power full-Adder cells designed with an alternative internal logic structure and pass-transistor logic styles that lead to have a reduced power-delay product (PDP). We carried out a comparison against other full-Adders reported as having a low PDP, in terms of s...
  verilog      Verilog     

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