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verilog for lsfr over bist

When desgin memories with larg portion, which include capacitance over bit-lines. The two bit-line are used perform a read and write operation, due to operation of discharging a capacitance in write operation. 7T SRAM cell reduces the activity factor of discharging the bit line pair to perform a...
  verilog      Verilog     

code verilog cordic core

A 100% behavioral implementation of a cordic core. The core is highly configurable through `defines. A testbench is included. See the included manual for details...
  verilog      Verilog     

DDR2 controller, verilog source code

Using verilog prepared of DDR2 controller, achieved has DDR2 of reads and writes function, in Xilinx vietex5 Shang to achieved, achieved has Imaging algorithm in the of data turn home,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,...
  verilog      Verilog     

Introduction to verilog

This article introduces the basics of verilog HDL language, to enable the beginner to quickly grasp the HDL Design methods, preliminary reports and to master the basics of verilog HDL language, to be able to read simple design code and Enough to make some simple verilog HDL design modeling...
  verilog      Verilog     

Floating-point multiply verilog FPGA

Digital multiplier, as an integral part of modern computers, their design work and more and more people's attention. This paper, hardware description languages verilog HDL design a floating-point multiplier based on complement one multiplication and design functions and better flexibility. Th...
  verilog      Verilog     

I2C verilog

I2C verilog files. Define a simple interface of I2C. After testing to ensure the using....
  verilog      Verilog     

verilog serial port serial port receive module receiver module

verilog serial port serial port receive module receiver module, contains the BPS modules, level detection module and the control module...
  verilog      Verilog     

8,051 nuclear verilog source code

8,051 core RTL source code, with integrated testbench and scripts 8,051 core RTL source code, with integrated testbench and scripts 8,051 core RTL source code, with integrated testbench and scripts 8,051 core RTL source code, with integrated testbench and scripts 8,051 core R...
  verilog        ASM     

verilog float calculate

This code is used in verilog, to calculate 2 float numbers,which to be calculated nubmer are all32 bits,it can be used....
  verilog      Verilog     

PLL LMX2531 verilog Configurator

Source verilog programming, registers are used for configuring the PLL LMX2531, the output frequency is 1 GHz, has proven the value of the register, the clock output frequencies without problems, written with three-state machines, incidentally, one AD device configured, refer the reader to key refer...
  verilog      Verilog     

"Original" display __ __verilog_ _FPGA control _1602 debugging notes

FPGA control principle and LCD1602 debugging notes source code This information came from Baidu bases (http://wenku.Baidu.com/) You now see the document is used to hold rice Baidu base generated by the Download Manager This document's original address from Thank you for your support Hold rice...
  verilog      Verilog     

verilog code for the GPS baseband processing

GPS software receiver baseband processing verilog programs, by spread spectrum demodulation, intermediate frequency data synchronization process converts the raw navigation data...
  verilog      Verilog     

Digital Speed meter with rotation direction detection in verilog

This is a complete working module coded in verilog to detect the speed of rotations of a rotating wheel . Also it gives the direction of rotation . This can be directly implemented in a fpga board and within this module there's a special small module to generate the test signals for the metere . So...
  verilog      Verilog     

Code verilog for motion compensated prediction block of video

This is a project about VLSI design.Topic is design for motion compensated prediction block in compressed video.Project consisted Code RTL,Code Testbench.  Project use software of synopsys for example: Design Compiler (Synthesis),IC Compiler (Layout)......
  verilog      Verilog     

code verilog for cordic

This is a project about VLSI design.Topic is design for CORDIC (for COordinate Rotation DIgital Computer),also known as the digit-by-digit method and Volder's algorithm.Project consisted Code RTL,Code Testbench.  Project use software...
  verilog      Verilog     

IR receiver verilog modules

This module is suitable for all IR receiver, please note that when using modified code, you receive is to identify user codes, code marked, thank you all for your support!...
  verilog      Verilog     

Design module Bluetooth by verilog

The Bluetooth is a standard protocol for wireless connection between devices such as cell phones, PDAs, PCs and any other device. The main objective for this standard is to provide a royalty free standard for such wireless protocol. The objective of this project is to build an opensource free blueto...
  verilog      Verilog     

Parallel in serial out using verilog

This simplied program simulates the parallel in serial out. Implemented on Altera board succesfully. in case parallel in serial out, the data is accepted serially and is outputted after certain number of clock cycles....
  verilog      Verilog     

radix 2 fft 32 bit using verilog

it provides source code for 32 point fft using verilog along with multiplier which describes butterfly unit using 32 bit multiplier along with carry look aheaada adder 32 bit using behavioural description.....
  verilog      Verilog     

verilog implementation of cordic algorithm

CORDIC algorithm can be implemented through different forms of solving multiplication, Division, square root, and some  trigonometric functions Operational problems. These calculation of trigonometric functions is to use hardware is Not easy to attain, and the CORDIC algorithm can...
  verilog      Verilog     

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