Search altera de2 audio codec, 300 result(s) found

de2-115 BCD 3 digit counter

2015-11-25 23:14    By:beccanm      View:87      Download:1

In this program we use the de2-115 board to scroll HELLO on the display each time a key is pressed by shifting it on the left. The architecture uses a pipeline and a multiplexer ...

vhdl VHDL

de2_115_TV Development Board routines, including SDRAM and asynchronous FIFO

2015-11-27 21:21    By:zwallow      View:3141      Download:1

de2_115_TV Development Board routines, including SDRAM and application of asynchronous FIFO: through coordinated control 2 in 2 out of a total of 4 FIFO operation SDRAM...

verilog Verilog

de2 practice source 2-1

2015-11-21 04:21    By:jamiechoo      View:23      Download:0

Part I We wish to display on the 7-segment displays HEX3 to HEX0 the values set by the switches SW15−0. Let the values denoted by SW15−12, SW11−8, SW7−4 and SW3−0 be displayed on HEX3, HEX2, HEX1 and HEX0, respectively. Your circuit should be able to display the digits from 0 to 9, and...

Embeded VHDL

de2 Board with memory functions of stopwatch

2015-07-19 04:46    By:爷们1896      View:342      Download:0

1, Verilog language 2, stopwatch function, and memory functions. The stopwatch can be used for timing, and reset, pause and start button;    timer, you can make the appropriate records. And the stopwatch with two pause button, one after a pause the stopwatch continues to go,    a...

verilog Verilog

Switches, Lights, and Multiplexers - de2-115

2015-10-14 21:01    By:koco      View:70      Download:0

The purpose of this exercise is to learn how to connect simple input and output devices to an FPGA chip and implement a circuit that uses these devices. We will use the switches SW17􀀀0 on the de2-series board as inputs to the circuit. We will use light emitting diodes (LEDs) and 7-segment displ...

vhdl VHDL

audionet Device Driver (WDM)

2015-06-22 22:49    By:syamkumar      View:30      Download:1

===== audionet ===== The goal of audionet is transparently networked audio interfaces primarily for Windows. It is based arround a windows audio driver supporting multiple audio streaming procotols: - raw PCM streaming - RAOP or Airtunes 2 (in planning) Installation ------------...

Driver Development Visual C++

Gigabit network programs available from altera Corporation

2015-11-01 20:08    By:freefpga      View:106      Download:5

The source code download altera official website, providing 3C120 for use with altera Corporation Board, but the program can still draw on Gigabit Ethernet. It uses the IP provided by altera Triple-Speed-Ethernet nuclear Qsys-system is constructed, and then write programs in nios2....

verilog Verilog

Based on altera's Nios II checksum use validate the C2H Accelerator system-Cyclone II

2015-11-18 00:06    By:jisungroc      View:2774      Download:1

Based on altera's Nios II checksum use validate the C2H Accelerator system has been validated by the DE-2 Board, Component,Software Code there is DMA mode, and Custom Instruction, and General compared the component. Want to know NiosII system should have a lot of help....

verilog Verilog

Lab altera 1

2015-01-08 05:23    By:quanap5      View:15      Download:0

This is a code for lab 1.2 from altera. It is basic code for beginner to get familiar with altera kit and hardware description language (VHDL).The purpose of this exercise is to learn how to connect simple input and output devices to an FPGA chip and implement a circuit that uses these devices....

vhdl VHDL

Linux on de2i-150 under example programs

2015-06-21 05:32    By:Han_cl      View:48      Download:1

This folder contains the de2i-150 on development of technology combined with altera Board sample program based on Linux and related documentation, including FPGA-end sample code, and PCIe driver ATOM ends, upper applications, break de2i-150!...

Linux programming C


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