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8 digital tube display
no vote
Experimental procedure: (specific experimental procedures and tips, see appendix) 1. open the Quartus II, using Verilog text input methods, complete the above description logic input, Compilation, simulation, and downloads. And its realization on platform of DE2. Follow these steps: (1). in the text document written in Verilog code, write a testbench test code in a text document. (2). engineering, hardware selection, select a simulation tool for ModelSim-Altera, create the Verilog files, text input. (3). the compilation and distribution of pins. (Right click the PIN from the Excel and enter) (4.) a new testbench for ModelSim simulation. After setting the testbench, called ModelSim for functionality and timing simulation. (5). Configuring the FPGA on DE2 implement functions to be completed on. And test. 2. the experiment the same as steps 1.
HGang
2016-08-23
0
1
Answer four, FPGA,Verilog
no vote
Design reference sample, for example, when the design when the file is loaded into the target device, and core Board reset button is pressed, start contest. Then, press S1-S4, first press the key of the key value is the digital display, the corresponding LED lights were lit. Meanwhile, other keys lost responder role. DE2 development boards
HGang
2016-08-23
0
1
Design of a digital stopwatch
4.0
Design of a ticking clock, system clock, choose clock module 1KHz, due to the timing clock signals for 100Hz, 10 the system clock frequency is therefore required to get, chose 1KHz clock because seven-segment code needs to scan shows, so I chose 1KHz. Addition to control convenient, needs a reset press, and started timing press and stop timing press, by Xia reset key, system reset, all registers all clear zero; by Xia began key, stopwatch started timing; by Xia stop key, stopwatch stop timing, and seven segment yards tube displayed current timing time, if again by Xia began key, stopwatch continues to timing, unless by Xia reset key, system to reset, displayed all for 00-00-00.
HGang
2016-08-23
1
1
Mouse display
no vote
&Take the design reference example as an example, first connect the ps2 mouse on the ps2-ms interface, when the design file is loaded into the target device, the mouse coordinate value will be displayed on the nixie tube, and the mouse coordinate value will change when moving. Press the reset key to return the coordinate value to the starting coordinate.
HGang
2016-08-23
0
1
Frequency meter, FPGA
no vote
When the design file is loaded into the target device, press the key switch S8. If led16 is lit, the module starts to measure the frequency of the internal signal. Press the reset key of the core board to display the frequency of the internal signal on the nixie tube. The user can change the frequency of the internal signal through S1-S4. At the same time, the signal source can be observed in the sixth pin of the expansion interface of the development board. If the key switch S8 is pressed and led16 is not lit, then the external clock signal measured by the module can be accessed by the user through the 40th pin of the expansion interface of the development board for measurement. Change the clock of the digital signal source to see if the displayed value is consistent with the mark value.
HGang
2016-08-23
0
1
Water lamp FPGA
no vote
Taking the design reference example as an example, when the design file is loaded into the target device, the LED light will flash according to the rule set by the program.
HGang
2016-08-23
0
1
Controllable pulse generator
no vote
Taking the design reference example as an example, when the design file is loaded into the target device, press the S8 key of the key switch module, and a rectangular wave with a frequency of about 1kHz and a duty cycle of 50% can be observed through the oscilloscope at the 40 pin of the output observation module expansion module. Press S1 or S2 key, the frequency of the rectangular wave will increase or decrease accordingly. Press S3 or S4, the duty cycle of the rectangular wave will increase or decrease accordingly.
HGang
2016-08-23
0
1
Counter FPGA
no vote
Taking the design reference example as an example, when the design file is loaded into the target device, press the key switch S2, if led16 is turned on, the count data will be displayed through led1-led10. On the contrary, it does not count (the adder does not work). When the reset key (S1 key of the key switch) is pressed, the count is cleared.
HGang
2016-08-23
0
1
Multi-function digital clock
no vote
When the design when the file is loaded into the target device, digital tube display time, starting from 00-00-00. On the hour when the last 5 seconds, LED lamp module LED1-LED4 starts flashing. Once over the whole point, LED stopped showing. Push button switch S1, S2, the hour and minute begin stepping out time adjustment. Press the RESET switch, display back to 00-00-00 start time appears.
HGang
2016-08-23
0
1
Eight-digit seven-segment digital tube drive
no vote
Design reference sample, for example, when the design when the file is loaded into the target device, 0-F appears on the digital control changes in values and in turn, hitting the reset button are displayed starting from 0. Simulation waveform are drawn.
HGang
2016-08-23
0
1
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