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Time measurement based on FPGA and AD a/d conversi
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This is our school curriculum design time topic, the code is using Verilog language, used to write is in the FPGA given distance and other parameters under the condition of time measurement and in the receiver and transmitter AD and Da analog-to-digital conversion. The technical specifications are as follows: AD sampling rate: 1gsps, ad resolution: 8bit / s, ranging range: 30km, ranging accuracy: 0.5ns. The realization method is as follows: the 250MHz clock signal is used to obtain 1GHz sampling frequency by phase shifting and frequency doubling. FPGA sends signal, then receives echo. The sampling frequency is 4 times of the clock oscillation frequency, so the received data is the 4-wire 8bit data after high-speed AD sampling quantization
miawan
2016-08-23
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