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DDR2 controller Verilog
4.0
Application background Verilog language DDR2 controller, mainly through the control of the user interface control DDR2 DDR2 read and write, this program is to complete a simple write address, write data to DDR2, and then write the address, read data back, to verify the DDR2 read and write. Key Technology By using the ISE Xilinx tool, and the V5 110t Xilinx board, the successful implementation of the read and write. By controlling the user side interface of AP AF addr, APP WDF addr, APP signal written into the DDR2 controller in the readback read data FIFO signal
weibolingbu
2016-08-23
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