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VHDL for 16 bit Time Domain Convolution
3.8
Convolution is a common operation in digital signal processing. In this project, I created a custom circuit implemented on the Nallatech board that exploits a significant amount of parallelism to improve performance compared to a microprocessor. Convolution takes as input a signal and a kernell The output is another signal, where each element of the output signal is the sum of the products formed by multiplying all the element of  the kernel with appropriate element of the input signal. 16 bit unsigned interger operations is used, the FPGA will store the input signal in SRAM and will read in a kernel through the memory map.
liyangddd
2016-08-23
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