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CACHE_dspLib_fft_dspL137
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Example Description: * This example initializes the cache using the rCSL macros to configure * the L1, L2, and MAR bits to enhance the performance of source code * located in external memory. To illustrate the performance enhancement, * the example uses the C674x DSP Library assembly function * DSPF_sp_fftSPxSP as a benchmark test case. The DSP function is tested * with the cache disabled, with the MAR bits set as well as L1 enabled, * and with the MAR bits, L1, and L2 enabled. The number of clock cycles * to compute the function under each condition is printed to the console.
guu1214
2016-08-23
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