Upload Code
loading-left
loading loading loading
loading-right

Loading

Profile
No self-introduction
codes (2)
Romeo and Juliet
no vote
This code displayed a colors and it needs to be connected with the GPIO.. hope you like it. It is not my work.
krisha
2016-08-23
1
1
FPGA accumulator
4.0
This project is implemented in Quartus 2, altera company in DE2 board.... the design has a function to accumulate the given output... this has to be learn in basic coding in verilog HDL.. this is still so basic programming and it has to be enhance and improve.. Make it a more complex ut also precise coding scheme... thank you for viewing my work..
krisha
2016-08-23
0
1
No more~